Commit 147a70ce authored Mar 09, 2017 by Mark Rutland

arm64: sysreg: add physical timer registers



This patch adds sysreg definitions for system registers used to control
the architected physical timer. Subsequent patches will make use of
these definitions.

The encodings were taken from ARM DDI 0487A.k_iss10775, Table C5-6.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>

parent 0e9884fe

arch/arm64/include/asm/sysreg.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -182,6 +182,10 @@

		#define SYS_CNTFRQ_EL0 sys_reg(3, 3, 14, 0, 0)

		#define SYS_CNTP_TVAL_EL0 sys_reg(3, 3, 14, 2, 0)
		#define SYS_CNTP_CTL_EL0 sys_reg(3, 3, 14, 2, 1)
		#define SYS_CNTP_CVAL_EL0 sys_reg(3, 3, 14, 2, 2)

		#define __PMEV_op2(n) ((n) & 0x7)
		#define __CNTR_CRm(n) (0x8 \| (((n) >> 3) & 0x3))
		#define SYS_PMEVCNTRn_EL0(n) sys_reg(3, 3, 14, __CNTR_CRm(n), __PMEV_op2(n))