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Commit 14746306 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Thomas Gleixner:
 "Hopefully the last round of fixes for 3.19

   - regression fix for the LDT changes
   - regression fix for XEN interrupt handling caused by the APIC
     changes
   - regression fixes for the PAT changes
   - last minute fixes for new the MPX support
   - regression fix for 32bit UP
   - fix for a long standing relocation issue on 64bit tagged for stable
   - functional fix for the Hyper-V clocksource tagged for stable
   - downgrade of a pr_err which tends to confuse users

  Looks a bit on the large side, but almost half of it are valuable
  comments"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/tsc: Change Fast TSC calibration failed from error to info
  x86/apic: Re-enable PCI_MSI support for non-SMP X86_32
  x86, mm: Change cachemode exports to non-gpl
  x86, tls: Interpret an all-zero struct user_desc as "no segment"
  x86, tls, ldt: Stop checking lm in LDT_empty
  x86, mpx: Strictly enforce empty prctl() args
  x86, mpx: Fix potential performance issue on unmaps
  x86, mpx: Explicitly disable 32-bit MPX support on 64-bit kernels
  x86, hyperv: Mark the Hyper-V clocksource as being continuous
  x86: Don't rely on VMWare emulating PAT MSR correctly
  x86, irq: Properly tag virtualization entry in /proc/interrupts
  x86, boot: Skip relocs when load address unchanged
  x86/xen: Override ACPI IRQ management callback __acpi_unregister_gsi
  ACPI: pci: Do not clear pci_dev->irq in acpi_pci_irq_disable()
  x86/xen: Treat SCI interrupt as normal GSI interrupt
parents 4d2f0ef1 52045217

arch/x86/Kconfig

+5 −1
Original line number Diff line number Diff line
@@ -857,7 +857,7 @@ source "kernel/Kconfig.preempt" 


config X86_UP_APIC

	bool "Local APIC support on uniprocessors"

	depends on X86_32 && !SMP && !X86_32_NON_STANDARD && !PCI_MSI

	depends on X86_32 && !SMP && !X86_32_NON_STANDARD

	---help---

	  A local APIC (Advanced Programmable Interrupt Controller) is an

	  integrated interrupt controller in the CPU. If you have a single-CPU
@@ -868,6 +868,10 @@ config X86_UP_APIC 
	  performance counters), and the NMI watchdog which detects hard

	  lockups.



config X86_UP_APIC_MSI

	def_bool y

	select X86_UP_APIC if X86_32 && !SMP && !X86_32_NON_STANDARD && PCI_MSI



config X86_UP_IOAPIC

	bool "IO-APIC support on uniprocessors"

	depends on X86_UP_APIC

arch/x86/boot/compressed/misc.c

+8 −1
Original line number Diff line number Diff line
@@ -373,6 +373,8 @@ asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap, 
				  unsigned long output_len,

				  unsigned long run_size)

{

	unsigned char *output_orig = output;



	real_mode = rmode;



	sanitize_boot_params(real_mode);
@@ -421,6 +423,11 @@ asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap, 
	debug_putstr("\nDecompressing Linux... ");

	decompress(input_data, input_len, NULL, NULL, output, NULL, error);

	parse_elf(output);

	/*

	 * 32-bit always performs relocations. 64-bit relocations are only

	 * needed if kASLR has chosen a different load address.

	 */

	if (!IS_ENABLED(CONFIG_X86_64) || output != output_orig)

		handle_relocations(output, output_len);

	debug_putstr("done.\nBooting the kernel.\n");

	return output;

arch/x86/include/asm/acpi.h

+1 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ void acpi_pic_sci_set_trigger(unsigned int, u16); 


extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,

				  int trigger, int polarity);

extern void (*__acpi_unregister_gsi)(u32 gsi);



static inline void disable_acpi(void)

{

arch/x86/include/asm/desc.h

+14 −6
Original line number Diff line number Diff line
@@ -251,7 +251,8 @@ static inline void native_load_tls(struct thread_struct *t, unsigned int cpu) 
		gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];

}



#define _LDT_empty(info)				\

/* This intentionally ignores lm, since 32-bit apps don't have that field. */

#define LDT_empty(info)					\

	((info)->base_addr		== 0	&&	\

	 (info)->limit			== 0	&&	\

	 (info)->contents		== 0	&&	\
@@ -261,11 +262,18 @@ static inline void native_load_tls(struct thread_struct *t, unsigned int cpu) 
	 (info)->seg_not_present	== 1	&&	\

	 (info)->useable		== 0)



#ifdef CONFIG_X86_64

#define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0))

#else

#define LDT_empty(info) (_LDT_empty(info))

#endif

/* Lots of programs expect an all-zero user_desc to mean "no segment at all". */

static inline bool LDT_zero(const struct user_desc *info)

{

	return (info->base_addr		== 0 &&

		info->limit		== 0 &&

		info->contents		== 0 &&

		info->read_exec_only	== 0 &&

		info->seg_32bit		== 0 &&

		info->limit_in_pages	== 0 &&

		info->seg_not_present	== 0 &&

		info->useable		== 0);

}



static inline void clear_LDT(void)

{

arch/x86/include/asm/mmu_context.h

+19 −1
Original line number Diff line number Diff line
@@ -130,6 +130,24 @@ static inline void arch_bprm_mm_init(struct mm_struct *mm, 
static inline void arch_unmap(struct mm_struct *mm, struct vm_area_struct *vma,

			      unsigned long start, unsigned long end)

{

	/*

	 * mpx_notify_unmap() goes and reads a rarely-hot

	 * cacheline in the mm_struct.  That can be expensive

	 * enough to be seen in profiles.

	 *

	 * The mpx_notify_unmap() call and its contents have been

	 * observed to affect munmap() performance on hardware

	 * where MPX is not present.

	 *

	 * The unlikely() optimizes for the fast case: no MPX

	 * in the CPU, or no MPX use in the process.  Even if

	 * we get this wrong (in the unlikely event that MPX

	 * is widely enabled on some system) the overhead of

	 * MPX itself (reading bounds tables) is expected to

	 * overwhelm the overhead of getting this unlikely()

	 * consistently wrong.

	 */

	if (unlikely(cpu_feature_enabled(X86_FEATURE_MPX)))

		mpx_notify_unmap(mm, vma, start, end);

}