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Commit 13fecb83 authored by Steve Wise's avatar Steve Wise Committed by Roland Dreier
Browse files

RDMA/cxgb4: Zero out ISGL padding 



The HW design requires zeroing any pad in SGLs.

Signed-off-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarRoland Dreier <rolandd@cisco.com>
parent af93fb5d

drivers/infiniband/hw/cxgb4/qp.c

+4 −0
Original line number Diff line number Diff line
@@ -263,6 +263,9 @@ static int build_immd(struct t4_sq *sq, struct fw_ri_immd *immdp, 
			rem -= len;

		}

	}

	len = roundup(plen + sizeof *immdp, 16) - (plen + sizeof *immdp);

	if (len)

		memset(dstp, 0, len);

	immdp->op = FW_RI_DATA_IMMD;

	immdp->r1 = 0;

	immdp->r2 = 0;
@@ -292,6 +295,7 @@ static int build_isgl(__be64 *queue_start, __be64 *queue_end, 
		if (++flitp == queue_end)

			flitp = queue_start;

	}

	*flitp = (__force __be64)0;

	isglp->op = FW_RI_DATA_ISGL;

	isglp->r1 = 0;

	isglp->nsge = cpu_to_be16(num_sge);