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Commit 13d70b81 authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter
Browse files

drm/i915: rename INSTDONE1 to GEN4_INSTDONE1 



This register was added on GEN4, by the name INSTDONE_1 whereas the GEN6
specification calls it INSTDONE_2. Keep the original name with a
platform prefix to make it clearer which INSTDONE register instance this
is. Also add a comment about the SNB alternative name.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent bd93a50e

drivers/gpu/drm/i915/i915_gpu_error.c

+1 −1
Original line number Diff line number Diff line
@@ -1391,7 +1391,7 @@ void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone) 
		instdone[0] = I915_READ(GEN2_INSTDONE);

	else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {

		instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));

		instdone[1] = I915_READ(INSTDONE1);

		instdone[1] = I915_READ(GEN4_INSTDONE1);

	} else if (INTEL_INFO(dev)->gen >= 7) {

		instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));

		instdone[1] = I915_READ(GEN7_SC_INSTDONE);

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -1611,7 +1611,7 @@ enum skl_disp_power_wells { 
#define RING_INSTPM(base)	((base)+0xc0)

#define RING_MI_MODE(base)	((base)+0x9c)

#define INSTPS		0x02070 /* 965+ only */

#define INSTDONE1	0x0207c /* 965+ only */

#define GEN4_INSTDONE1	0x0207c /* 965+ only, aka INSTDONE_2 on SNB */

#define ACTHD_I965	0x02074

#define HWS_PGA		0x02080

#define HWS_ADDRESS_MASK	0xfffff000