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Commit 13a87c12 authored by Janusz Wolak's avatar Janusz Wolak Committed by Jeff Kirsher
Browse files

e1000: Elementary checkpatch warnings and checks removed 



Signed-off-by: default avatarJanusz Wolak <januszvdm@gmail.com>
Acked-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent c619581a

drivers/net/ethernet/intel/e1000/e1000_hw.c

+89 −90
Original line number Diff line number Diff line 
/*******************************************************************************



*

  Intel PRO/1000 Linux driver

  Copyright(c) 1999 - 2006 Intel Corporation.
@@ -624,8 +624,8 @@ s32 e1000_init_hw(struct e1000_hw *hw) 
		/* Workaround for PCI-X problem when BIOS sets MMRBC

		 * incorrectly.

		 */

		if (hw->bus_type == e1000_bus_type_pcix

		    && e1000_pcix_get_mmrbc(hw) > 2048)

		if (hw->bus_type == e1000_bus_type_pcix &&

		    e1000_pcix_get_mmrbc(hw) > 2048)

			e1000_pcix_set_mmrbc(hw, 2048);

		break;

	}
@@ -684,9 +684,8 @@ static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw) 


	ret_val = e1000_read_eeprom(hw, EEPROM_SERDES_AMPLITUDE, 1,

				    &eeprom_data);

	if (ret_val) {

	if (ret_val)

		return ret_val;

	}



	if (eeprom_data != EEPROM_RESERVED_WORD) {

		/* Adjust SERDES output amplitude only. */
@@ -1074,8 +1073,8 @@ static s32 e1000_copper_link_preconfig(struct e1000_hw *hw) 


	if (hw->mac_type <= e1000_82543 ||

	    hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 ||

	    hw->mac_type == e1000_82541_rev_2

	    || hw->mac_type == e1000_82547_rev_2)

	    hw->mac_type == e1000_82541_rev_2 ||

	    hw->mac_type == e1000_82547_rev_2)

		hw->phy_reset_disable = false;



	return E1000_SUCCESS;
@@ -1881,10 +1880,11 @@ static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw) 
		if (ret_val)

			return ret_val;



		if ((hw->mac_type == e1000_82544 || hw->mac_type == e1000_82543)

		    && (!hw->autoneg)

		    && (hw->forced_speed_duplex == e1000_10_full

			|| hw->forced_speed_duplex == e1000_10_half)) {

		if ((hw->mac_type == e1000_82544 ||

		     hw->mac_type == e1000_82543) &&

		    (!hw->autoneg) &&

		    (hw->forced_speed_duplex == e1000_10_full ||

		     hw->forced_speed_duplex == e1000_10_half)) {

			ret_val = e1000_polarity_reversal_workaround(hw);

			if (ret_val)

				return ret_val;
@@ -2084,11 +2084,12 @@ static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw) 
	 * so we had to force link.  In this case, we need to force the

	 * configuration of the MAC to match the "fc" parameter.

	 */

	if (((hw->media_type == e1000_media_type_fiber) && (hw->autoneg_failed))

	    || ((hw->media_type == e1000_media_type_internal_serdes)

		&& (hw->autoneg_failed))

	    || ((hw->media_type == e1000_media_type_copper)

		&& (!hw->autoneg))) {

	if (((hw->media_type == e1000_media_type_fiber) &&

	     (hw->autoneg_failed)) ||

	    ((hw->media_type == e1000_media_type_internal_serdes) &&

	     (hw->autoneg_failed)) ||

	    ((hw->media_type == e1000_media_type_copper) &&

	     (!hw->autoneg))) {

		ret_val = e1000_force_mac_fc(hw);

		if (ret_val) {

			e_dbg("Error forcing flow control settings\n");
@@ -2458,10 +2459,11 @@ s32 e1000_check_for_link(struct e1000_hw *hw) 
			 * happen due to the execution of this workaround.

			 */



			if ((hw->mac_type == e1000_82544

			     || hw->mac_type == e1000_82543) && (!hw->autoneg)

			    && (hw->forced_speed_duplex == e1000_10_full

				|| hw->forced_speed_duplex == e1000_10_half)) {

			if ((hw->mac_type == e1000_82544 ||

			     hw->mac_type == e1000_82543) &&

			    (!hw->autoneg) &&

			    (hw->forced_speed_duplex == e1000_10_full ||

			     hw->forced_speed_duplex == e1000_10_half)) {

				ew32(IMC, 0xffffffff);

				ret_val =

				    e1000_polarity_reversal_workaround(hw);
@@ -2526,8 +2528,10 @@ s32 e1000_check_for_link(struct e1000_hw *hw) 
		 */

		if (hw->tbi_compatibility_en) {

			u16 speed, duplex;



			ret_val =

			    e1000_get_speed_and_duplex(hw, &speed, &duplex);



			if (ret_val) {

				e_dbg

				    ("Error getting link speed and duplex\n");
@@ -2626,10 +2630,10 @@ s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex) 
			    e1000_read_phy_reg(hw, PHY_LP_ABILITY, &phy_data);

			if (ret_val)

				return ret_val;

			if ((*speed == SPEED_100

			     && !(phy_data & NWAY_LPAR_100TX_FD_CAPS))

			    || (*speed == SPEED_10

				&& !(phy_data & NWAY_LPAR_10T_FD_CAPS)))

			if ((*speed == SPEED_100 &&

			     !(phy_data & NWAY_LPAR_100TX_FD_CAPS)) ||

			    (*speed == SPEED_10 &&

			     !(phy_data & NWAY_LPAR_10T_FD_CAPS)))

				*duplex = HALF_DUPLEX;

		}

	}
@@ -2662,9 +2666,9 @@ static s32 e1000_wait_autoneg(struct e1000_hw *hw) 
		ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);

		if (ret_val)

			return ret_val;

		if (phy_data & MII_SR_AUTONEG_COMPLETE) {

		if (phy_data & MII_SR_AUTONEG_COMPLETE)

			return E1000_SUCCESS;

		}



		msleep(100);

	}

	return E1000_SUCCESS;
@@ -2801,7 +2805,6 @@ static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw) 
	return data;

}





/**

 * e1000_read_phy_reg - read a phy register

 * @hw: Struct containing variables accessed by shared code
@@ -3399,7 +3402,6 @@ static s32 e1000_phy_m88_get_info(struct e1000_hw *hw, 
		phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >>

				       SR_1000T_REMOTE_RX_STATUS_SHIFT) ?

		    e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok;



	}



	return E1000_SUCCESS;
@@ -3609,11 +3611,11 @@ static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count) 
	 */

	mask = 0x01 << (count - 1);

	eecd = er32(EECD);

	if (eeprom->type == e1000_eeprom_microwire) {

	if (eeprom->type == e1000_eeprom_microwire)

		eecd &= ~E1000_EECD_DO;

	} else if (eeprom->type == e1000_eeprom_spi) {

	else if (eeprom->type == e1000_eeprom_spi)

		eecd |= E1000_EECD_DO;

	}



	do {

		/* A "1" is shifted out to the EEPROM by setting bit "DI" to a

		 * "1", and then raising and then lowering the clock (the SK bit
@@ -3880,6 +3882,7 @@ static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw) 
s32 e1000_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

{

	s32 ret;



	mutex_lock(&e1000_eeprom_lock);

	ret = e1000_do_read_eeprom(hw, offset, words, data);

	mutex_unlock(&e1000_eeprom_lock);
@@ -3901,8 +3904,9 @@ static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, 
	/* A check for invalid values:  offset too large, too many words, and

	 * not enough words.

	 */

	if ((offset >= eeprom->word_size)

	    || (words > eeprom->word_size - offset) || (words == 0)) {

	if ((offset >= eeprom->word_size) ||

	    (words > eeprom->word_size - offset) ||

	    (words == 0)) {

		e_dbg("\"words\" parameter out of bounds. Words = %d,"

		      "size = %d\n", offset, eeprom->word_size);

		return -E1000_ERR_EEPROM;
@@ -4051,6 +4055,7 @@ s32 e1000_update_eeprom_checksum(struct e1000_hw *hw) 
s32 e1000_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

{

	s32 ret;



	mutex_lock(&e1000_eeprom_lock);

	ret = e1000_do_write_eeprom(hw, offset, words, data);

	mutex_unlock(&e1000_eeprom_lock);
@@ -4072,8 +4077,9 @@ static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, 
	/* A check for invalid values:  offset too large, too many words, and

	 * not enough words.

	 */

	if ((offset >= eeprom->word_size)

	    || (words > eeprom->word_size - offset) || (words == 0)) {

	if ((offset >= eeprom->word_size) ||

	    (words > eeprom->word_size - offset) ||

	    (words == 0)) {

		e_dbg("\"words\" parameter out of bounds\n");

		return -E1000_ERR_EEPROM;

	}
@@ -4142,6 +4148,7 @@ static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset, u16 words, 
		 */

		while (widx < words) {

			u16 word_out = data[widx];



			word_out = (word_out >> 8) | (word_out << 8);

			e1000_shift_out_ee_bits(hw, word_out, 16);

			widx++;
@@ -4817,8 +4824,8 @@ void e1000_update_adaptive(struct e1000_hw *hw) 
				}

			}

		} else {

			if (hw->in_ifs_mode

			    && (hw->tx_packet_delta <= MIN_NUM_XMITS)) {

			if (hw->in_ifs_mode &&

			    (hw->tx_packet_delta <= MIN_NUM_XMITS)) {

				hw->current_ifs_val = 0;

				hw->in_ifs_mode = false;

				ew32(AIT, 0);
@@ -4923,7 +4930,6 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, 


	/* Use old method for Phy older than IGP */

	if (hw->phy_type == e1000_phy_m88) {



		ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,

					     &phy_data);

		if (ret_val)
@@ -4967,7 +4973,6 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, 
		};

		/* Read the AGC registers for all channels */

		for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {



			ret_val =

			    e1000_read_phy_reg(hw, agc_reg_array[i], &phy_data);

			if (ret_val)
@@ -4977,8 +4982,8 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, 


			/* Value bound check. */

			if ((cur_agc_value >=

			     IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1)

			    || (cur_agc_value == 0))

			     IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) ||

			    (cur_agc_value == 0))

				return -E1000_ERR_PHY;



			agc_value += cur_agc_value;
@@ -5055,7 +5060,6 @@ static s32 e1000_check_polarity(struct e1000_hw *hw, 
		 */

		if ((phy_data & IGP01E1000_PSSR_SPEED_MASK) ==

		    IGP01E1000_PSSR_SPEED_1000MBPS) {



			/* Read the GIG initialization PCS register (0x00B4) */

			ret_val =

			    e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG,
@@ -5347,9 +5351,8 @@ static s32 e1000_set_phy_mode(struct e1000_hw *hw) 
		ret_val =

		    e1000_read_eeprom(hw, EEPROM_PHY_CLASS_WORD, 1,

				      &eeprom_data);

		if (ret_val) {

		if (ret_val)

			return ret_val;

		}



		if ((eeprom_data != EEPROM_RESERVED_WORD) &&

		    (eeprom_data & EEPROM_PHY_CLASS_A)) {
@@ -5396,8 +5399,8 @@ static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active) 
	 * from the lowest speeds starting from 10Mbps. The capability is used

	 * for Dx transitions and states

	 */

	if (hw->mac_type == e1000_82541_rev_2

	    || hw->mac_type == e1000_82547_rev_2) {

	if (hw->mac_type == e1000_82541_rev_2 ||

	    hw->mac_type == e1000_82547_rev_2) {

		ret_val =

		    e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO, &phy_data);

		if (ret_val)
@@ -5447,11 +5450,9 @@ static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active) 
			if (ret_val)

				return ret_val;

		}

	} else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT)

		   || (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL)

		   || (hw->autoneg_advertised ==

		       AUTONEG_ADVERTISE_10_100_ALL)) {



	} else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT) ||

		   (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL) ||

		   (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_100_ALL)) {

		if (hw->mac_type == e1000_82541_rev_2 ||

		    hw->mac_type == e1000_82547_rev_2) {

			phy_data |= IGP01E1000_GMII_FLEX_SPD;
@@ -5475,7 +5476,6 @@ static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active) 
					phy_data);

		if (ret_val)

			return ret_val;



	}

	return E1000_SUCCESS;

}
@@ -5543,7 +5543,6 @@ static s32 e1000_set_vco_speed(struct e1000_hw *hw) 
	return E1000_SUCCESS;

}





/**

 * e1000_enable_mng_pass_thru - check for bmc pass through

 * @hw: Struct containing variables accessed by shared code