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Commit 128cccea authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next

More stuff for 4.17. Highlights:
- More fixes for "wattman" like functionality (fine grained clk/voltage control)
- Add more power profile infrastucture (context based dpm)
- SR-IOV fixes
- Add iomem debugging interface for use with umr
- Powerplay and cgs cleanups
- DC fixes and cleanups
- ttm improvements
- Misc cleanups all over

* 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (143 commits)
  drm/amdgpu:Always save uvd vcpu_bo in VM Mode
  drm/amdgpu:Correct max uvd handles
  drm/amdgpu: replace iova debugfs file with iomem (v3)
  drm/amd/display: validate plane format on primary plane
  drm/amdgpu: Clean sdma wptr register when only enable wptr polling
  drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files
  drm/amdgpu: give warning before sleep in kiq_r/wreg
  drm/amdgpu: further mitigate workaround for i915
  drm/amdgpu: drop gtt->adev
  drm/amdgpu: add amdgpu_evict_gtt debugfs entry
  drm/amd/pp: Add #ifdef checks for CONFIG_ACPI
  drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory"
  drm/amd/pp: Drop wrapper functions for upper/lower_32_bits
  drm/amdgpu: Delete cgs wrapper functions for gpu memory manager
  drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory
  drm/amd/pp: Remove cgs wrapper function for temperature update
  Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature"
  drm/amd/pp: Add auto power profilng switch based on workloads (v2)
  drm/amd/pp: Revert gfx/compute profile switch sysfs
  drm/amd/pp: Fix sclk in highest two levels when compute on smu7
  ...
parents 2ec360bb f6c3b601
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+0 −1
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@ FULL_AMD_DISPLAY_PATH = $(FULL_AMD_PATH)/$(DISPLAY_FOLDER_NAME)
ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
	-I$(FULL_AMD_PATH)/include \
	-I$(FULL_AMD_PATH)/amdgpu \
	-I$(FULL_AMD_PATH)/scheduler \
	-I$(FULL_AMD_PATH)/powerplay/inc \
	-I$(FULL_AMD_PATH)/acp/include \
	-I$(FULL_AMD_DISPLAY_PATH) \
+2 −17
Original line number Diff line number Diff line
@@ -181,10 +181,6 @@ extern int amdgpu_cik_support;
#define CIK_CURSOR_WIDTH 128
#define CIK_CURSOR_HEIGHT 128

/* GPU RESET flags */
#define AMDGPU_RESET_INFO_VRAM_LOST  (1 << 0)
#define AMDGPU_RESET_INFO_FULLRESET  (1 << 1)

struct amdgpu_device;
struct amdgpu_ib;
struct amdgpu_cs_parser;
@@ -343,14 +339,6 @@ struct amdgpu_ih_funcs {
bool amdgpu_get_bios(struct amdgpu_device *adev);
bool amdgpu_read_bios(struct amdgpu_device *adev);

/*
 * Dummy page
 */
struct amdgpu_dummy_page {
	struct page	*page;
	dma_addr_t	addr;
};

/*
 * Clocks
 */
@@ -1080,7 +1068,7 @@ static inline void amdgpu_set_ib_value(struct amdgpu_cs_parser *p,
/*
 * Writeback
 */
#define AMDGPU_MAX_WB 512	/* Reserve at most 512 WB slots for amdgpu-owned rings. */
#define AMDGPU_MAX_WB 128	/* Reserve at most 128 WB slots for amdgpu-owned rings. */

struct amdgpu_wb {
	struct amdgpu_bo	*wb_obj;
@@ -1505,7 +1493,7 @@ struct amdgpu_device {
	/* MC */
	struct amdgpu_gmc		gmc;
	struct amdgpu_gart		gart;
	struct amdgpu_dummy_page	dummy_page;
	dma_addr_t			dummy_page_addr;
	struct amdgpu_vm_manager	vm_manager;
	struct amdgpu_vmhub             vmhub[AMDGPU_MAX_VMHUBS];

@@ -1839,9 +1827,6 @@ void amdgpu_device_vram_location(struct amdgpu_device *adev,
void amdgpu_device_gart_location(struct amdgpu_device *adev,
				 struct amdgpu_gmc *mc);
int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);
void amdgpu_ttm_set_active_vram_size(struct amdgpu_device *adev, u64 size);
int amdgpu_ttm_init(struct amdgpu_device *adev);
void amdgpu_ttm_fini(struct amdgpu_device *adev);
void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
					     const u32 *registers,
					     const u32 array_size);
+3 −0
Original line number Diff line number Diff line
@@ -540,6 +540,9 @@ int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
	size_t size;
	u32 retry = 3;

	if (amdgpu_acpi_pcie_notify_device_ready(adev))
		return -EINVAL;

	/* Get the device handle */
	handle = ACPI_HANDLE(&adev->pdev->dev);
	if (!handle)
+0 −434
Original line number Diff line number Diff line
@@ -24,7 +24,6 @@
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/acpi.h>
#include <drm/drmP.h>
#include <linux/firmware.h>
#include <drm/amdgpu_drm.h>
@@ -42,152 +41,6 @@ struct amdgpu_cgs_device {
	struct amdgpu_device *adev =					\
		((struct amdgpu_cgs_device *)cgs_device)->adev

static void *amdgpu_cgs_register_pp_handle(struct cgs_device *cgs_device,
			int (*call_back_func)(struct amd_pp_init *, void **))
{
	CGS_FUNC_ADEV;
	struct amd_pp_init pp_init;
	struct amd_powerplay *amd_pp;

	if (call_back_func == NULL)
		return NULL;

	amd_pp = &(adev->powerplay);
	pp_init.chip_family = adev->family;
	pp_init.chip_id = adev->asic_type;
	pp_init.pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false;
	pp_init.feature_mask = amdgpu_pp_feature_mask;
	pp_init.device = cgs_device;
	if (call_back_func(&pp_init, &(amd_pp->pp_handle)))
		return NULL;

	return adev->powerplay.pp_handle;
}

static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
				    enum cgs_gpu_mem_type type,
				    uint64_t size, uint64_t align,
				    cgs_handle_t *handle)
{
	CGS_FUNC_ADEV;
	uint16_t flags = 0;
	int ret = 0;
	uint32_t domain = 0;
	struct amdgpu_bo *obj;

	/* fail if the alignment is not a power of 2 */
	if (((align != 1) && (align & (align - 1)))
	    || size == 0 || align == 0)
		return -EINVAL;


	switch(type) {
	case CGS_GPU_MEM_TYPE__VISIBLE_CONTIG_FB:
	case CGS_GPU_MEM_TYPE__VISIBLE_FB:
		flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
			AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
		domain = AMDGPU_GEM_DOMAIN_VRAM;
		break;
	case CGS_GPU_MEM_TYPE__INVISIBLE_CONTIG_FB:
	case CGS_GPU_MEM_TYPE__INVISIBLE_FB:
		flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
			AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
		domain = AMDGPU_GEM_DOMAIN_VRAM;
		break;
	case CGS_GPU_MEM_TYPE__GART_CACHEABLE:
		domain = AMDGPU_GEM_DOMAIN_GTT;
		break;
	case CGS_GPU_MEM_TYPE__GART_WRITECOMBINE:
		flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;
		domain = AMDGPU_GEM_DOMAIN_GTT;
		break;
	default:
		return -EINVAL;
	}


	*handle = 0;

	ret = amdgpu_bo_create(adev, size, align, true, domain, flags,
			       NULL, NULL, &obj);
	if (ret) {
		DRM_ERROR("(%d) bo create failed\n", ret);
		return ret;
	}
	*handle = (cgs_handle_t)obj;

	return ret;
}

static int amdgpu_cgs_free_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
{
	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;

	if (obj) {
		int r = amdgpu_bo_reserve(obj, true);
		if (likely(r == 0)) {
			amdgpu_bo_kunmap(obj);
			amdgpu_bo_unpin(obj);
			amdgpu_bo_unreserve(obj);
		}
		amdgpu_bo_unref(&obj);

	}
	return 0;
}

static int amdgpu_cgs_gmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,
				   uint64_t *mcaddr)
{
	int r;
	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;

	WARN_ON_ONCE(obj->placement.num_placement > 1);

	r = amdgpu_bo_reserve(obj, true);
	if (unlikely(r != 0))
		return r;
	r = amdgpu_bo_pin(obj, obj->preferred_domains, mcaddr);
	amdgpu_bo_unreserve(obj);
	return r;
}

static int amdgpu_cgs_gunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
{
	int r;
	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
	r = amdgpu_bo_reserve(obj, true);
	if (unlikely(r != 0))
		return r;
	r = amdgpu_bo_unpin(obj);
	amdgpu_bo_unreserve(obj);
	return r;
}

static int amdgpu_cgs_kmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,
				   void **map)
{
	int r;
	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
	r = amdgpu_bo_reserve(obj, true);
	if (unlikely(r != 0))
		return r;
	r = amdgpu_bo_kmap(obj, map);
	amdgpu_bo_unreserve(obj);
	return r;
}

static int amdgpu_cgs_kunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
{
	int r;
	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
	r = amdgpu_bo_reserve(obj, true);
	if (unlikely(r != 0))
		return r;
	amdgpu_bo_kunmap(obj);
	amdgpu_bo_unreserve(obj);
	return r;
}

static uint32_t amdgpu_cgs_read_register(struct cgs_device *cgs_device, unsigned offset)
{
@@ -857,61 +710,6 @@ static int amdgpu_cgs_is_virtualization_enabled(void *cgs_device)
	return amdgpu_sriov_vf(adev);
}

static int amdgpu_cgs_query_system_info(struct cgs_device *cgs_device,
					struct cgs_system_info *sys_info)
{
	CGS_FUNC_ADEV;

	if (NULL == sys_info)
		return -ENODEV;

	if (sizeof(struct cgs_system_info) != sys_info->size)
		return -ENODEV;

	switch (sys_info->info_id) {
	case CGS_SYSTEM_INFO_ADAPTER_BDF_ID:
		sys_info->value = adev->pdev->devfn | (adev->pdev->bus->number << 8);
		break;
	case CGS_SYSTEM_INFO_PCIE_GEN_INFO:
		sys_info->value = adev->pm.pcie_gen_mask;
		break;
	case CGS_SYSTEM_INFO_PCIE_MLW:
		sys_info->value = adev->pm.pcie_mlw_mask;
		break;
	case CGS_SYSTEM_INFO_PCIE_DEV:
		sys_info->value = adev->pdev->device;
		break;
	case CGS_SYSTEM_INFO_PCIE_REV:
		sys_info->value = adev->pdev->revision;
		break;
	case CGS_SYSTEM_INFO_CG_FLAGS:
		sys_info->value = adev->cg_flags;
		break;
	case CGS_SYSTEM_INFO_PG_FLAGS:
		sys_info->value = adev->pg_flags;
		break;
	case CGS_SYSTEM_INFO_GFX_CU_INFO:
		sys_info->value = adev->gfx.cu_info.number;
		break;
	case CGS_SYSTEM_INFO_GFX_SE_INFO:
		sys_info->value = adev->gfx.config.max_shader_engines;
		break;
	case CGS_SYSTEM_INFO_PCIE_SUB_SYS_ID:
		sys_info->value = adev->pdev->subsystem_device;
		break;
	case CGS_SYSTEM_INFO_PCIE_SUB_SYS_VENDOR_ID:
		sys_info->value = adev->pdev->subsystem_vendor;
		break;
	case CGS_SYSTEM_INFO_PCIE_BUS_DEVFN:
		sys_info->value = adev->pdev->devfn;
		break;
	default:
		return -ENODEV;
	}

	return 0;
}

static int amdgpu_cgs_get_active_displays_info(struct cgs_device *cgs_device,
					  struct cgs_display_info *info)
{
@@ -982,235 +780,7 @@ static int amdgpu_cgs_notify_dpm_enabled(struct cgs_device *cgs_device, bool ena
	return 0;
}

/** \brief evaluate acpi namespace object, handle or pathname must be valid
 *  \param cgs_device
 *  \param info input/output arguments for the control method
 *  \return status
 */

#if defined(CONFIG_ACPI)
static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,
				    struct cgs_acpi_method_info *info)
{
	CGS_FUNC_ADEV;
	acpi_handle handle;
	struct acpi_object_list input;
	struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
	union acpi_object *params, *obj;
	uint8_t name[5] = {'\0'};
	struct cgs_acpi_method_argument *argument;
	uint32_t i, count;
	acpi_status status;
	int result;

	handle = ACPI_HANDLE(&adev->pdev->dev);
	if (!handle)
		return -ENODEV;

	memset(&input, 0, sizeof(struct acpi_object_list));

	/* validate input info */
	if (info->size != sizeof(struct cgs_acpi_method_info))
		return -EINVAL;

	input.count = info->input_count;
	if (info->input_count > 0) {
		if (info->pinput_argument == NULL)
			return -EINVAL;
		argument = info->pinput_argument;
		for (i = 0; i < info->input_count; i++) {
			if (((argument->type == ACPI_TYPE_STRING) ||
			     (argument->type == ACPI_TYPE_BUFFER)) &&
			    (argument->pointer == NULL))
				return -EINVAL;
			argument++;
		}
	}

	if (info->output_count > 0) {
		if (info->poutput_argument == NULL)
			return -EINVAL;
		argument = info->poutput_argument;
		for (i = 0; i < info->output_count; i++) {
			if (((argument->type == ACPI_TYPE_STRING) ||
				(argument->type == ACPI_TYPE_BUFFER))
				&& (argument->pointer == NULL))
				return -EINVAL;
			argument++;
		}
	}

	/* The path name passed to acpi_evaluate_object should be null terminated */
	if ((info->field & CGS_ACPI_FIELD_METHOD_NAME) != 0) {
		strncpy(name, (char *)&(info->name), sizeof(uint32_t));
		name[4] = '\0';
	}

	/* parse input parameters */
	if (input.count > 0) {
		input.pointer = params =
				kzalloc(sizeof(union acpi_object) * input.count, GFP_KERNEL);
		if (params == NULL)
			return -EINVAL;

		argument = info->pinput_argument;

		for (i = 0; i < input.count; i++) {
			params->type = argument->type;
			switch (params->type) {
			case ACPI_TYPE_INTEGER:
				params->integer.value = argument->value;
				break;
			case ACPI_TYPE_STRING:
				params->string.length = argument->data_length;
				params->string.pointer = argument->pointer;
				break;
			case ACPI_TYPE_BUFFER:
				params->buffer.length = argument->data_length;
				params->buffer.pointer = argument->pointer;
				break;
			default:
				break;
			}
			params++;
			argument++;
		}
	}

	/* parse output info */
	count = info->output_count;
	argument = info->poutput_argument;

	/* evaluate the acpi method */
	status = acpi_evaluate_object(handle, name, &input, &output);

	if (ACPI_FAILURE(status)) {
		result = -EIO;
		goto free_input;
	}

	/* return the output info */
	obj = output.pointer;

	if (count > 1) {
		if ((obj->type != ACPI_TYPE_PACKAGE) ||
			(obj->package.count != count)) {
			result = -EIO;
			goto free_obj;
		}
		params = obj->package.elements;
	} else
		params = obj;

	if (params == NULL) {
		result = -EIO;
		goto free_obj;
	}

	for (i = 0; i < count; i++) {
		if (argument->type != params->type) {
			result = -EIO;
			goto free_obj;
		}
		switch (params->type) {
		case ACPI_TYPE_INTEGER:
			argument->value = params->integer.value;
			break;
		case ACPI_TYPE_STRING:
			if ((params->string.length != argument->data_length) ||
				(params->string.pointer == NULL)) {
				result = -EIO;
				goto free_obj;
			}
			strncpy(argument->pointer,
				params->string.pointer,
				params->string.length);
			break;
		case ACPI_TYPE_BUFFER:
			if (params->buffer.pointer == NULL) {
				result = -EIO;
				goto free_obj;
			}
			memcpy(argument->pointer,
				params->buffer.pointer,
				argument->data_length);
			break;
		default:
			break;
		}
		argument++;
		params++;
	}

	result = 0;
free_obj:
	kfree(obj);
free_input:
	kfree((void *)input.pointer);
	return result;
}
#else
static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,
				struct cgs_acpi_method_info *info)
{
	return -EIO;
}
#endif

static int amdgpu_cgs_call_acpi_method(struct cgs_device *cgs_device,
					uint32_t acpi_method,
					uint32_t acpi_function,
					void *pinput, void *poutput,
					uint32_t output_count,
					uint32_t input_size,
					uint32_t output_size)
{
	struct cgs_acpi_method_argument acpi_input[2] = { {0}, {0} };
	struct cgs_acpi_method_argument acpi_output = {0};
	struct cgs_acpi_method_info info = {0};

	acpi_input[0].type = CGS_ACPI_TYPE_INTEGER;
	acpi_input[0].data_length = sizeof(uint32_t);
	acpi_input[0].value = acpi_function;

	acpi_input[1].type = CGS_ACPI_TYPE_BUFFER;
	acpi_input[1].data_length = input_size;
	acpi_input[1].pointer = pinput;

	acpi_output.type = CGS_ACPI_TYPE_BUFFER;
	acpi_output.data_length = output_size;
	acpi_output.pointer = poutput;

	info.size = sizeof(struct cgs_acpi_method_info);
	info.field = CGS_ACPI_FIELD_METHOD_NAME | CGS_ACPI_FIELD_INPUT_ARGUMENT_COUNT;
	info.input_count = 2;
	info.name = acpi_method;
	info.pinput_argument = acpi_input;
	info.output_count = output_count;
	info.poutput_argument = &acpi_output;

	return amdgpu_cgs_acpi_eval_object(cgs_device, &info);
}

static int amdgpu_cgs_set_temperature_range(struct cgs_device *cgs_device,
					int min_temperature,
					int max_temperature)
{
	CGS_FUNC_ADEV;

	adev->pm.dpm.thermal.min_temp = min_temperature;
	adev->pm.dpm.thermal.max_temp = max_temperature;

	return 0;
}

static const struct cgs_ops amdgpu_cgs_ops = {
	.alloc_gpu_mem = amdgpu_cgs_alloc_gpu_mem,
	.free_gpu_mem = amdgpu_cgs_free_gpu_mem,
	.gmap_gpu_mem = amdgpu_cgs_gmap_gpu_mem,
	.gunmap_gpu_mem = amdgpu_cgs_gunmap_gpu_mem,
	.kmap_gpu_mem = amdgpu_cgs_kmap_gpu_mem,
	.kunmap_gpu_mem = amdgpu_cgs_kunmap_gpu_mem,
	.read_register = amdgpu_cgs_read_register,
	.write_register = amdgpu_cgs_write_register,
	.read_ind_register = amdgpu_cgs_read_ind_register,
@@ -1225,13 +795,9 @@ static const struct cgs_ops amdgpu_cgs_ops = {
	.set_clockgating_state = amdgpu_cgs_set_clockgating_state,
	.get_active_displays_info = amdgpu_cgs_get_active_displays_info,
	.notify_dpm_enabled = amdgpu_cgs_notify_dpm_enabled,
	.call_acpi_method = amdgpu_cgs_call_acpi_method,
	.query_system_info = amdgpu_cgs_query_system_info,
	.is_virtualization_enabled = amdgpu_cgs_is_virtualization_enabled,
	.enter_safe_mode = amdgpu_cgs_enter_safe_mode,
	.lock_grbm_idx = amdgpu_cgs_lock_grbm_idx,
	.register_pp_handle = amdgpu_cgs_register_pp_handle,
	.set_temperature_range = amdgpu_cgs_set_temperature_range,
};

static const struct cgs_os_ops amdgpu_cgs_os_ops = {
+2 −2
Original line number Diff line number Diff line
@@ -346,8 +346,8 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
	struct ttm_operation_ctx ctx = {
		.interruptible = true,
		.no_wait_gpu = false,
		.allow_reserved_eviction = false,
		.resv = bo->tbo.resv
		.resv = bo->tbo.resv,
		.flags = 0
	};
	uint32_t domain;
	int r;
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