Merge "ARM: dts: msm: Add ids for new bus masters and slaves"

#define	MSM_BUS_FAB_GEM_NOC 6156

#define	MSM_BUS_FAB_NPU_NOC 6157

#define	MSM_BUS_FAB_QUP_VIRT 6158

#define	MSM_BUS_FAB_GPU_VIRT 6159

#define	MSM_BUS_FAB_MMNRT_VIRT 6160

#define	MSM_BUS_FAB_MMRT_VIRT 6161

#define	MSM_BUS_FAB_MC_VIRT_DISPLAY 26000

#define	MSM_BUS_FAB_MEM_NOC_DISPLAY 26001

#define	MSM_BUS_MASTER_ANOC_PCIE_GEM_NOC 175

#define	MSM_BUS_MASTER_QUP_CORE_0 176

#define	MSM_BUS_MASTER_QUP_CORE_1 177

#define	MSM_BUS_MASTER_SNOC_BIMC_RT 178

#define	MSM_BUS_MASTER_SNOC_BIMC_NRT 179

#define	MSM_BUS_MASTER_GPU_CDSP_PROC 180

#define	MSM_BUS_MASTER_ANOC_SNOC 181

#define	MSM_BUS_MASTER_LLCC_DISPLAY 20000

#define	MSM_BUS_MASTER_MNOC_HF_MEM_NOC_DISPLAY 20001

#define	MSM_BUS_SLAVE_QUP_CORE_0 823

#define	MSM_BUS_SLAVE_QUP_CORE_1 824

#define	MSM_BUS_SLAVE_EMMC_CFG 825

#define	MSM_BUS_SLAVE_CDSP_THROTTLE_CFG 826

#define	MSM_BUS_SLAVE_CAMERA_NRT_THROTTLE_CFG 827

#define	MSM_BUS_SLAVE_CAMERA_RT_THROTTLE_CFG 828

#define	MSM_BUS_SLAVE_GPU_CFG 829

#define	MSM_BUS_SLAVE_GPU_THROTTLE_CFG 830

#define	MSM_BUS_SLAVE_QM_MPU_CFG 831

#define	MSM_BUS_SLAVE_SNOC_BIMC_NRT 832

#define	MSM_BUS_SLAVE_SNOC_BIMC_RT 833

#define	MSM_BUS_SLAVE_ANOC_SNOC 834

#define	MSM_BUS_SLAVE_GPU_CDSP_BIMC 835

#define	MSM_BUS_SLAVE_EBI_CH0_DISPLAY 20512

#define	MSM_BUS_SLAVE_LLCC_DISPLAY 20513

#define	ICBID_MASTER_LPASS_LPAIF 159

#define	ICBID_MASTER_LPASS_LEC 160

#define	ICBID_MASTER_LPASS_ANOC_BIMC 161

#define	ICBID_MASTER_SNOC_BIMC_RT 163

#define	ICBID_MASTER_SNOC_BIMC_NRT 164

#define	ICBID_MASTER_VIDEO_PROC	168

#define	ICBID_MASTER_QUP_CORE_0 170

#define	ICBID_MASTER_QUP_CORE_1 171

#define	ICBID_MASTER_GPU_CDSP_PROC 165

#define	ICBID_MASTER_QUP_0 166

#define	ICBID_MASTER_UFS_MEM 167

#define	ICBID_MASTER_CAMNOC_SF 172

#define	ICBID_MASTER_CAMNOC_HF 173

#define	ICBID_SLAVE_EBI1 0

#define	ICBID_SLAVE_APPSS_L2 1

#define	ICBID_SLAVE_PCNOC_S_10 245

#define	ICBID_SLAVE_PCNOC_S_11 246

#define	ICBID_SLAVE_LPASS_ANOC_BIMC 247

#define	ICBID_SLAVE_SNOC_BIMC_NRT 248

#define	ICBID_SLAVE_SNOC_BIMC_RT 249

#define	ICBID_SLAVE_QUP_0 250

#define	ICBID_SLAVE_UFS_MEM_CFG 251

#define	ICBID_SLAVE_VSENSE_CTRL_CFG 252

#define	ICBID_SLAVE_QUP_CORE_0 253

#define	ICBID_SLAVE_QUP_CORE_1 254

#define	ICBID_SLAVE_GPU_CDSP_BIMC 255

#define	ICBID_SLAVE_AHB2PHY_USB 256

#define	ICBID_SLAVE_APSS_THROTTLE_CFG 257

#define	ICBID_SLAVE_CAMERA_NRT_THROTTLE_CFG 258

#define	ICBID_SLAVE_CDSP_THROTTLE_CFG 259

#define	ICBID_SLAVE_DDR_PHY_CFG 260

#define	ICBID_SLAVE_DDR_SS_CFG 261

#define	ICBID_SLAVE_GPU_CFG 262

#define	ICBID_SLAVE_GPU_THROTTLE_CFG 263

#define	ICBID_SLAVE_MAPSS 264

#define	ICBID_SLAVE_MDSP_MPU_CFG 265

#define	ICBID_SLAVE_CAMERA_RT_THROTTLE_CFG 266

#endif