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Commit 11f2b494 authored by Emil Tantilov's avatar Emil Tantilov Committed by Jeff Kirsher
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ixgbe: use correct mask when enabling sriov 



Swap the parameters in GENMASK in order to generate the correct mask.

This change fixes Tx hangs when enabling SRIOV.

Signed-off-by: default avatarEmil Tantilov <emil.s.tantilov@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 7e2c3aea

drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -3767,9 +3767,9 @@ static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) 
	reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;

	reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;





	/* Enable only the PF's pool for Tx/Rx */

	/* Enable only the PF's pool for Tx/Rx */

	IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(vf_shift, 31));

	IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));

	IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);

	IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);

	IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(vf_shift, 31));

	IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));

	IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);

	IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);

	if (adapter->bridge_mode == BRIDGE_MODE_VEB)

	if (adapter->bridge_mode == BRIDGE_MODE_VEB)

		IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);

		IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);