diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c index 416c8d3041e0b6b013d0828b0e69206bfec496ea..867b87809132b329cf6470872190da8907661f38 100644 --- a/drivers/gpu/drm/msm/sde/sde_crtc.c +++ b/drivers/gpu/drm/msm/sde/sde_crtc.c @@ -4844,6 +4844,19 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, if (catalog->qseed_type == SDE_SSPP_SCALER_QSEED3LITE) sde_kms_info_add_keystr(info, "qseed_type", "qseed3lite"); + sde_kms_info_add_keyint(info, "UBWC version", catalog->ubwc_version); + sde_kms_info_add_keyint(info, "UBWC macrotile_mode", + catalog->macrotile_mode); + sde_kms_info_add_keyint(info, "UBWC highest banking bit", + catalog->mdp[0].highest_bank_bit); + sde_kms_info_add_keyint(info, "UBWC swizzle", + catalog->mdp[0].ubwc_swizzle); + + if (of_fdt_get_ddrtype() == LP_DDR4_TYPE) + sde_kms_info_add_keystr(info, "DDR version", "DDR4"); + else + sde_kms_info_add_keystr(info, "DDR version", "DDR5"); + if (sde_is_custom_client()) { /* No support for SMART_DMA_V1 yet */ if (catalog->smart_dma_rev == SDE_SSPP_SMART_DMA_V2) diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.h b/drivers/gpu/drm/msm/sde/sde_crtc.h index c0c0a7d903e586e059e0bfc312ee681a5d2fc89b..3e6582179910cd1e19ebb3d416903fa9d1e19799 100644 --- a/drivers/gpu/drm/msm/sde/sde_crtc.h +++ b/drivers/gpu/drm/msm/sde/sde_crtc.h @@ -20,6 +20,7 @@ #define _SDE_CRTC_H_ #include +#include #include #include "msm_prop.h" #include "sde_fence.h" diff --git a/drivers/gpu/drm/msm/sde/sde_hw_util.h b/drivers/gpu/drm/msm/sde/sde_hw_util.h index 1f7aa4ad6c981ee210eb9fa6c0bf6e0bd945a393..a8d49d4033da63c1af868ce74e76fb97615813a5 100644 --- a/drivers/gpu/drm/msm/sde/sde_hw_util.h +++ b/drivers/gpu/drm/msm/sde/sde_hw_util.h @@ -12,6 +12,8 @@ #include "sde_hw_catalog.h" #define REG_MASK(n) ((BIT(n)) - 1) +#define LP_DDR4_TYPE 0x4 + struct sde_format_extended; /*