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Commit 10e15a63 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'uniphier-fixes-v4.9' of... 

Merge tag 'uniphier-fixes-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into fixes

UniPhier ARM SoC fixes for v4.9

- Add "select ARCH_HAS_RESET_CONTROLLER" in Kconfig
- Rename wrongly-named mioctrl to sdctrl

* tag 'uniphier-fixes-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier

:
  arm64: dts: uniphier: change MIO node to SD control node
  ARM: dts: uniphier: change MIO node to SD control node
  reset: uniphier: rename MIO reset to SD reset for Pro5, PXs2, LD20 SoCs
  arm64: uniphier: select ARCH_HAS_RESET_CONTROLLER
  ARM: uniphier: select ARCH_HAS_RESET_CONTROLLER

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 27236051 8e68c65d

Documentation/devicetree/bindings/reset/uniphier-reset.txt

+31 −31
Original line number Diff line number Diff line
@@ -6,25 +6,25 @@ System reset 


Required properties:

- compatible: should be one of the following:

    "socionext,uniphier-sld3-reset" - for PH1-sLD3 SoC.

    "socionext,uniphier-ld4-reset"  - for PH1-LD4 SoC.

    "socionext,uniphier-pro4-reset" - for PH1-Pro4 SoC.

    "socionext,uniphier-sld8-reset" - for PH1-sLD8 SoC.

    "socionext,uniphier-pro5-reset" - for PH1-Pro5 SoC.

    "socionext,uniphier-pxs2-reset" - for ProXstream2/PH1-LD6b SoC.

    "socionext,uniphier-ld11-reset" - for PH1-LD11 SoC.

    "socionext,uniphier-ld20-reset" - for PH1-LD20 SoC.

    "socionext,uniphier-sld3-reset" - for sLD3 SoC.

    "socionext,uniphier-ld4-reset"  - for LD4 SoC.

    "socionext,uniphier-pro4-reset" - for Pro4 SoC.

    "socionext,uniphier-sld8-reset" - for sLD8 SoC.

    "socionext,uniphier-pro5-reset" - for Pro5 SoC.

    "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC.

    "socionext,uniphier-ld11-reset" - for LD11 SoC.

    "socionext,uniphier-ld20-reset" - for LD20 SoC.

- #reset-cells: should be 1.



Example:



	sysctrl@61840000 {

		compatible = "socionext,uniphier-ld20-sysctrl",

		compatible = "socionext,uniphier-ld11-sysctrl",

			     "simple-mfd", "syscon";

		reg = <0x61840000 0x4000>;



		reset {

			compatible = "socionext,uniphier-ld20-reset";

			compatible = "socionext,uniphier-ld11-reset";

			#reset-cells = <1>;

		};
@@ -32,30 +32,30 @@ Example: 
	};





Media I/O (MIO) reset

---------------------

Media I/O (MIO) reset, SD reset

-------------------------------



Required properties:

- compatible: should be one of the following:

    "socionext,uniphier-sld3-mio-reset" - for PH1-sLD3 SoC.

    "socionext,uniphier-ld4-mio-reset"  - for PH1-LD4 SoC.

    "socionext,uniphier-pro4-mio-reset" - for PH1-Pro4 SoC.

    "socionext,uniphier-sld8-mio-reset" - for PH1-sLD8 SoC.

    "socionext,uniphier-pro5-mio-reset" - for PH1-Pro5 SoC.

    "socionext,uniphier-pxs2-mio-reset" - for ProXstream2/PH1-LD6b SoC.

    "socionext,uniphier-ld11-mio-reset" - for PH1-LD11 SoC.

    "socionext,uniphier-ld20-mio-reset" - for PH1-LD20 SoC.

    "socionext,uniphier-sld3-mio-reset" - for sLD3 SoC.

    "socionext,uniphier-ld4-mio-reset"  - for LD4 SoC.

    "socionext,uniphier-pro4-mio-reset" - for Pro4 SoC.

    "socionext,uniphier-sld8-mio-reset" - for sLD8 SoC.

    "socionext,uniphier-pro5-sd-reset"  - for Pro5 SoC.

    "socionext,uniphier-pxs2-sd-reset"  - for PXs2/LD6b SoC.

    "socionext,uniphier-ld11-mio-reset" - for LD11 SoC.

    "socionext,uniphier-ld20-sd-reset"  - for LD20 SoC.

- #reset-cells: should be 1.



Example:



	mioctrl@59810000 {

		compatible = "socionext,uniphier-ld20-mioctrl",

		compatible = "socionext,uniphier-ld11-mioctrl",

			     "simple-mfd", "syscon";

		reg = <0x59810000 0x800>;



		reset {

			compatible = "socionext,uniphier-ld20-mio-reset";

			compatible = "socionext,uniphier-ld11-mio-reset";

			#reset-cells = <1>;

		};
@@ -68,24 +68,24 @@ Peripheral reset 


Required properties:

- compatible: should be one of the following:

    "socionext,uniphier-ld4-peri-reset"  - for PH1-LD4 SoC.

    "socionext,uniphier-pro4-peri-reset" - for PH1-Pro4 SoC.

    "socionext,uniphier-sld8-peri-reset" - for PH1-sLD8 SoC.

    "socionext,uniphier-pro5-peri-reset" - for PH1-Pro5 SoC.

    "socionext,uniphier-pxs2-peri-reset" - for ProXstream2/PH1-LD6b SoC.

    "socionext,uniphier-ld11-peri-reset" - for PH1-LD11 SoC.

    "socionext,uniphier-ld20-peri-reset" - for PH1-LD20 SoC.

    "socionext,uniphier-ld4-peri-reset"  - for LD4 SoC.

    "socionext,uniphier-pro4-peri-reset" - for Pro4 SoC.

    "socionext,uniphier-sld8-peri-reset" - for sLD8 SoC.

    "socionext,uniphier-pro5-peri-reset" - for Pro5 SoC.

    "socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC.

    "socionext,uniphier-ld11-peri-reset" - for LD11 SoC.

    "socionext,uniphier-ld20-peri-reset" - for LD20 SoC.

- #reset-cells: should be 1.



Example:



	perictrl@59820000 {

		compatible = "socionext,uniphier-ld20-perictrl",

		compatible = "socionext,uniphier-ld11-perictrl",

			     "simple-mfd", "syscon";

		reg = <0x59820000 0x200>;



		reset {

			compatible = "socionext,uniphier-ld20-peri-reset";

			compatible = "socionext,uniphier-ld11-peri-reset";

			#reset-cells = <1>;

		};

arch/arm/boot/dts/uniphier-pro5.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -184,11 +184,11 @@ 
};



&mio_clk {

	compatible = "socionext,uniphier-pro5-mio-clock";

	compatible = "socionext,uniphier-pro5-sd-clock";

};



&mio_rst {

	compatible = "socionext,uniphier-pro5-mio-reset";

	compatible = "socionext,uniphier-pro5-sd-reset";

};



&peri_clk {

arch/arm/boot/dts/uniphier-pxs2.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -197,11 +197,11 @@ 
};



&mio_clk {

	compatible = "socionext,uniphier-pxs2-mio-clock";

	compatible = "socionext,uniphier-pxs2-sd-clock";

};



&mio_rst {

	compatible = "socionext,uniphier-pxs2-mio-reset";

	compatible = "socionext,uniphier-pxs2-sd-reset";

};



&peri_clk {

arch/arm/mach-uniphier/Kconfig

+1 −0
Original line number Diff line number Diff line 
config ARCH_UNIPHIER

	bool "Socionext UniPhier SoCs"

	depends on ARCH_MULTI_V7

	select ARCH_HAS_RESET_CONTROLLER

	select ARM_AMBA

	select ARM_GLOBAL_TIMER

	select ARM_GIC

arch/arm64/Kconfig.platforms

+1 −0
Original line number Diff line number Diff line
@@ -190,6 +190,7 @@ config ARCH_THUNDER 


config ARCH_UNIPHIER

	bool "Socionext UniPhier SoC Family"

	select ARCH_HAS_RESET_CONTROLLER

	select PINCTRL

	help

	  This enables support for Socionext UniPhier SoC family.