Loading drivers/gpu/drm/radeon/evergreen.c +113 −108 Original line number Diff line number Diff line Loading @@ -3910,6 +3910,7 @@ int sumo_rlc_init(struct radeon_device *rdev) dws = rdev->rlc.reg_list_size; cs_data = rdev->rlc.cs_data; if (src_ptr) { /* save restore block */ if (rdev->rlc.save_restore_obj == NULL) { r = radeon_bo_create(rdev, dws * 4, PAGE_SIZE, true, Loading @@ -3933,6 +3934,7 @@ int sumo_rlc_init(struct radeon_device *rdev) sumo_rlc_fini(rdev); return r; } r = radeon_bo_kmap(rdev->rlc.save_restore_obj, (void **)&rdev->rlc.sr_ptr); if (r) { dev_warn(rdev->dev, "(%d) map RLC sr bo failed\n", r); Loading @@ -3959,7 +3961,9 @@ int sumo_rlc_init(struct radeon_device *rdev) radeon_bo_kunmap(rdev->rlc.save_restore_obj); radeon_bo_unreserve(rdev->rlc.save_restore_obj); } if (cs_data) { /* clear state block */ reg_list_num = 0; dws = 0; Loading Loading @@ -3989,12 +3993,12 @@ int sumo_rlc_init(struct radeon_device *rdev) r = radeon_bo_pin(rdev->rlc.clear_state_obj, RADEON_GEM_DOMAIN_VRAM, &rdev->rlc.clear_state_gpu_addr); if (r) { radeon_bo_unreserve(rdev->rlc.clear_state_obj); dev_warn(rdev->dev, "(%d) pin RLC c bo failed\n", r); sumo_rlc_fini(rdev); return r; } r = radeon_bo_kmap(rdev->rlc.clear_state_obj, (void **)&rdev->rlc.cs_ptr); if (r) { dev_warn(rdev->dev, "(%d) map RLC c bo failed\n", r); Loading Loading @@ -4035,6 +4039,7 @@ int sumo_rlc_init(struct radeon_device *rdev) radeon_bo_kunmap(rdev->rlc.clear_state_obj); radeon_bo_unreserve(rdev->rlc.clear_state_obj); } return 0; } Loading Loading
drivers/gpu/drm/radeon/evergreen.c +113 −108 Original line number Diff line number Diff line Loading @@ -3910,6 +3910,7 @@ int sumo_rlc_init(struct radeon_device *rdev) dws = rdev->rlc.reg_list_size; cs_data = rdev->rlc.cs_data; if (src_ptr) { /* save restore block */ if (rdev->rlc.save_restore_obj == NULL) { r = radeon_bo_create(rdev, dws * 4, PAGE_SIZE, true, Loading @@ -3933,6 +3934,7 @@ int sumo_rlc_init(struct radeon_device *rdev) sumo_rlc_fini(rdev); return r; } r = radeon_bo_kmap(rdev->rlc.save_restore_obj, (void **)&rdev->rlc.sr_ptr); if (r) { dev_warn(rdev->dev, "(%d) map RLC sr bo failed\n", r); Loading @@ -3959,7 +3961,9 @@ int sumo_rlc_init(struct radeon_device *rdev) radeon_bo_kunmap(rdev->rlc.save_restore_obj); radeon_bo_unreserve(rdev->rlc.save_restore_obj); } if (cs_data) { /* clear state block */ reg_list_num = 0; dws = 0; Loading Loading @@ -3989,12 +3993,12 @@ int sumo_rlc_init(struct radeon_device *rdev) r = radeon_bo_pin(rdev->rlc.clear_state_obj, RADEON_GEM_DOMAIN_VRAM, &rdev->rlc.clear_state_gpu_addr); if (r) { radeon_bo_unreserve(rdev->rlc.clear_state_obj); dev_warn(rdev->dev, "(%d) pin RLC c bo failed\n", r); sumo_rlc_fini(rdev); return r; } r = radeon_bo_kmap(rdev->rlc.clear_state_obj, (void **)&rdev->rlc.cs_ptr); if (r) { dev_warn(rdev->dev, "(%d) map RLC c bo failed\n", r); Loading Loading @@ -4035,6 +4039,7 @@ int sumo_rlc_init(struct radeon_device *rdev) radeon_bo_kunmap(rdev->rlc.clear_state_obj); radeon_bo_unreserve(rdev->rlc.clear_state_obj); } return 0; } Loading