Loading msm/vidc/msm_vidc_buffer_calculations.c +35 −36 Original line number Diff line number Diff line Loading @@ -764,16 +764,15 @@ static int msm_vidc_get_extra_input_buff_count(struct msm_vidc_inst *inst) if (!is_realtime_session(inst) || is_thumbnail_session(inst)) return extra_input_count; if (is_decode_session(inst)) { /* * Batch mode and HFR not supported for resolution greater than * UHD. Hence extra buffers are not required. */ f = &inst->fmts[INPUT_PORT].v4l2_fmt; if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) return extra_input_count; if (is_decode_session(inst)) { if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) goto exit; /* * Allocating 2 extra buffers, assuming current session is Loading Loading @@ -808,21 +807,21 @@ static int msm_vidc_get_extra_input_buff_count(struct msm_vidc_inst *inst) MIN_INPUT_BUFFERS); } } else if (is_encode_session(inst)) { /* * Both DCVS and HFR needs extra 4 buffers. Since all sessions * are DCVS eligible, we do not need extra handling for HFR as * we are making sure initial 4 sessions have extra 4 buffers. * For the remaining non-perf sessions, no extra buffers are * allocated and total number of buffers will be 4 with best * effort performance. */ /* add 4 extra buffers for dcvs */ if (core->resources.dcvs) extra_input_count = DCVS_ENC_EXTRA_INPUT_BUFFERS; /* Increase buffer count for HFR usecase */ if (msm_comm_get_num_perf_sessions(inst) < MAX_PERF_ELIGIBLE_SESSIONS) { MAX_PERF_ELIGIBLE_SESSIONS && msm_vidc_get_fps(inst) > 60) { inst->is_perf_eligible_session = true; extra_input_count = (HFR_ENC_TOTAL_INPUT_BUFFERS - MIN_INPUT_BUFFERS); } } exit: return extra_input_count; } Loading @@ -848,22 +847,25 @@ static int msm_vidc_get_extra_output_buff_count(struct msm_vidc_inst *inst) return extra_output_count; /* For HEIF, we are increasing buffer count */ if (is_image_session(inst)) { if (is_image_session(inst) || is_grid_session(inst)) { extra_output_count = (HEIF_ENC_TOTAL_OUTPUT_BUFFERS - MIN_ENC_OUTPUT_BUFFERS); return extra_output_count; } if (is_decode_session(inst)) { /* add 4 extra buffers for dcvs */ if (core->resources.dcvs) extra_output_count = DCVS_DEC_EXTRA_OUTPUT_BUFFERS; /* * Batch mode and HFR not supported for resolution greater than * UHD. Hence extra buffers are not required. */ f = &inst->fmts[INPUT_PORT].v4l2_fmt; if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) return extra_output_count; if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) goto exit; if (is_decode_session(inst)) { /* * Minimum number of decoder output buffers is codec specific. * If platform supports decode batching ensure minimum 6 extra Loading @@ -871,8 +873,6 @@ static int msm_vidc_get_extra_output_buff_count(struct msm_vidc_inst *inst) */ if (core->resources.decode_batching) extra_output_count = BATCH_DEC_EXTRA_OUTPUT_BUFFERS; else if (core->resources.dcvs) extra_output_count = DCVS_DEC_EXTRA_OUTPUT_BUFFERS; } else if (is_encode_session(inst)) { /* * Batching and DCVS are based on input. We assume that encoder Loading @@ -881,16 +881,15 @@ static int msm_vidc_get_extra_output_buff_count(struct msm_vidc_inst *inst) * For HFR, we are increasing buffer count to avoid latency/perf * issue to re-cycle buffers. */ if (msm_vidc_get_fps(inst) >= 120 && !res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 1920, 1088) && msm_comm_get_num_perf_sessions(inst) < MAX_PERF_ELIGIBLE_SESSIONS) { if (msm_comm_get_num_perf_sessions(inst) < MAX_PERF_ELIGIBLE_SESSIONS && msm_vidc_get_fps(inst) > 60) { inst->is_perf_eligible_session = true; extra_output_count = (HFR_ENC_TOTAL_OUTPUT_BUFFERS - MIN_ENC_OUTPUT_BUFFERS); } } exit: return extra_output_count; } Loading msm/vidc/msm_vidc_buffer_calculations.h +2 −1 Original line number Diff line number Diff line Loading @@ -6,8 +6,9 @@ #ifndef __H_MSM_VIDC_BUFFER_MEM_DEFS_H__ #define __H_MSM_VIDC_BUFFER_MEM_DEFS_H__ /* extra o/p buffers in case of decoder dcvs */ /* extra o/p buffers in case of dcvs */ #define DCVS_DEC_EXTRA_OUTPUT_BUFFERS 4 #define DCVS_ENC_EXTRA_INPUT_BUFFERS DCVS_DEC_EXTRA_OUTPUT_BUFFERS struct msm_vidc_dec_buff_size_calculators { u32 (*calculate_scratch_size)(struct msm_vidc_inst *inst, u32 width, Loading Loading
msm/vidc/msm_vidc_buffer_calculations.c +35 −36 Original line number Diff line number Diff line Loading @@ -764,16 +764,15 @@ static int msm_vidc_get_extra_input_buff_count(struct msm_vidc_inst *inst) if (!is_realtime_session(inst) || is_thumbnail_session(inst)) return extra_input_count; if (is_decode_session(inst)) { /* * Batch mode and HFR not supported for resolution greater than * UHD. Hence extra buffers are not required. */ f = &inst->fmts[INPUT_PORT].v4l2_fmt; if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) return extra_input_count; if (is_decode_session(inst)) { if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) goto exit; /* * Allocating 2 extra buffers, assuming current session is Loading Loading @@ -808,21 +807,21 @@ static int msm_vidc_get_extra_input_buff_count(struct msm_vidc_inst *inst) MIN_INPUT_BUFFERS); } } else if (is_encode_session(inst)) { /* * Both DCVS and HFR needs extra 4 buffers. Since all sessions * are DCVS eligible, we do not need extra handling for HFR as * we are making sure initial 4 sessions have extra 4 buffers. * For the remaining non-perf sessions, no extra buffers are * allocated and total number of buffers will be 4 with best * effort performance. */ /* add 4 extra buffers for dcvs */ if (core->resources.dcvs) extra_input_count = DCVS_ENC_EXTRA_INPUT_BUFFERS; /* Increase buffer count for HFR usecase */ if (msm_comm_get_num_perf_sessions(inst) < MAX_PERF_ELIGIBLE_SESSIONS) { MAX_PERF_ELIGIBLE_SESSIONS && msm_vidc_get_fps(inst) > 60) { inst->is_perf_eligible_session = true; extra_input_count = (HFR_ENC_TOTAL_INPUT_BUFFERS - MIN_INPUT_BUFFERS); } } exit: return extra_input_count; } Loading @@ -848,22 +847,25 @@ static int msm_vidc_get_extra_output_buff_count(struct msm_vidc_inst *inst) return extra_output_count; /* For HEIF, we are increasing buffer count */ if (is_image_session(inst)) { if (is_image_session(inst) || is_grid_session(inst)) { extra_output_count = (HEIF_ENC_TOTAL_OUTPUT_BUFFERS - MIN_ENC_OUTPUT_BUFFERS); return extra_output_count; } if (is_decode_session(inst)) { /* add 4 extra buffers for dcvs */ if (core->resources.dcvs) extra_output_count = DCVS_DEC_EXTRA_OUTPUT_BUFFERS; /* * Batch mode and HFR not supported for resolution greater than * UHD. Hence extra buffers are not required. */ f = &inst->fmts[INPUT_PORT].v4l2_fmt; if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) return extra_output_count; if (res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 4096, 2160)) goto exit; if (is_decode_session(inst)) { /* * Minimum number of decoder output buffers is codec specific. * If platform supports decode batching ensure minimum 6 extra Loading @@ -871,8 +873,6 @@ static int msm_vidc_get_extra_output_buff_count(struct msm_vidc_inst *inst) */ if (core->resources.decode_batching) extra_output_count = BATCH_DEC_EXTRA_OUTPUT_BUFFERS; else if (core->resources.dcvs) extra_output_count = DCVS_DEC_EXTRA_OUTPUT_BUFFERS; } else if (is_encode_session(inst)) { /* * Batching and DCVS are based on input. We assume that encoder Loading @@ -881,16 +881,15 @@ static int msm_vidc_get_extra_output_buff_count(struct msm_vidc_inst *inst) * For HFR, we are increasing buffer count to avoid latency/perf * issue to re-cycle buffers. */ if (msm_vidc_get_fps(inst) >= 120 && !res_is_greater_than(f->fmt.pix_mp.width, f->fmt.pix_mp.height, 1920, 1088) && msm_comm_get_num_perf_sessions(inst) < MAX_PERF_ELIGIBLE_SESSIONS) { if (msm_comm_get_num_perf_sessions(inst) < MAX_PERF_ELIGIBLE_SESSIONS && msm_vidc_get_fps(inst) > 60) { inst->is_perf_eligible_session = true; extra_output_count = (HFR_ENC_TOTAL_OUTPUT_BUFFERS - MIN_ENC_OUTPUT_BUFFERS); } } exit: return extra_output_count; } Loading
msm/vidc/msm_vidc_buffer_calculations.h +2 −1 Original line number Diff line number Diff line Loading @@ -6,8 +6,9 @@ #ifndef __H_MSM_VIDC_BUFFER_MEM_DEFS_H__ #define __H_MSM_VIDC_BUFFER_MEM_DEFS_H__ /* extra o/p buffers in case of decoder dcvs */ /* extra o/p buffers in case of dcvs */ #define DCVS_DEC_EXTRA_OUTPUT_BUFFERS 4 #define DCVS_ENC_EXTRA_INPUT_BUFFERS DCVS_DEC_EXTRA_OUTPUT_BUFFERS struct msm_vidc_dec_buff_size_calculators { u32 (*calculate_scratch_size)(struct msm_vidc_inst *inst, u32 width, Loading