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Commit 10759e82 authored by Jon Hunter's avatar Jon Hunter
Browse files

ARM: OMAP2+: Don't use __omap_dm_timer_reset() 



Currently OMAP2+ devices are using the function __omap_dm_timer_reset() to
configure the clock-activity, idle, wakeup-enable and auto-idle fields in the
timer OCP_CFG register. The name of the function is mis-leading because this
function does not actually perform a reset of the timer.

For OMAP2+ devices, HWMOD is responsible for reseting and configuring the
timer OCP_CFG register. Therefore, do not use __omap_dm_timer_reset() for
OMAP2+ devices and rely on HWMOD. Furthermore, some timer instances do not
have the fields clock-activity, wakeup-enable and auto-idle and so this
function could configure the OCP_CFG register incorrectly.

Currently HWMOD is not configuring the clock-activity field in the OCP_CFG
register for timers that have this field. Commit 0f0d0807 (ARM: OMAP: DMTimer:
Use posted mode) configures the clock-activity field to keep the f-clk enabled
so that the wake-up capability is enabled. Therefore, add the appropriate flags
to the timer HWMOD structures to configure this field in the same way.

For OMAP2/3 devices all dmtimers have the clock-activity field, where as for
OMAP4 devices, only dmtimer 1, 2 and 10 have the clock-activity field.

Verified on OMAP2420 H4, OMAP3430 Beagle and OMAP4430 Panda that HWMOD is
configuring the dmtimer OCP_CFG register as expected for clock-events timer.

Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent f3a13e72

arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c

+13 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { 
			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |

			   SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),

	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),

	.clockact       = CLOCKACT_TEST_ICLK,

	.sysc_fields	= &omap_hwmod_sysc_type1,

};
@@ -268,6 +269,7 @@ struct omap_hwmod omap2xxx_timer1_hwmod = { 
	},

	.dev_attr	= &capability_alwon_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer2 */
@@ -286,6 +288,7 @@ struct omap_hwmod omap2xxx_timer2_hwmod = { 
		},

	},

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer3 */
@@ -304,6 +307,7 @@ struct omap_hwmod omap2xxx_timer3_hwmod = { 
		},

	},

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer4 */
@@ -322,6 +326,7 @@ struct omap_hwmod omap2xxx_timer4_hwmod = { 
		},

	},

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer5 */
@@ -341,6 +346,7 @@ struct omap_hwmod omap2xxx_timer5_hwmod = { 
	},

	.dev_attr	= &capability_dsp_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer6 */
@@ -360,6 +366,7 @@ struct omap_hwmod omap2xxx_timer6_hwmod = { 
	},

	.dev_attr	= &capability_dsp_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer7 */
@@ -379,6 +386,7 @@ struct omap_hwmod omap2xxx_timer7_hwmod = { 
	},

	.dev_attr	= &capability_dsp_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer8 */
@@ -398,6 +406,7 @@ struct omap_hwmod omap2xxx_timer8_hwmod = { 
	},

	.dev_attr	= &capability_dsp_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer9 */
@@ -417,6 +426,7 @@ struct omap_hwmod omap2xxx_timer9_hwmod = { 
	},

	.dev_attr	= &capability_pwm_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer10 */
@@ -436,6 +446,7 @@ struct omap_hwmod omap2xxx_timer10_hwmod = { 
	},

	.dev_attr	= &capability_pwm_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer11 */
@@ -455,6 +466,7 @@ struct omap_hwmod omap2xxx_timer11_hwmod = { 
	},

	.dev_attr	= &capability_pwm_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer12 */
@@ -474,6 +486,7 @@ struct omap_hwmod omap2xxx_timer12_hwmod = { 
	},

	.dev_attr	= &capability_pwm_dev_attr,

	.class		= &omap2xxx_timer_hwmod_class,

	.flags          = HWMOD_SET_DEFAULT_CLOCKACT,

};



/* wd_timer2 */

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

+13 −0
Original line number Diff line number Diff line
@@ -162,6 +162,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = { 
			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |

			   SYSS_HAS_RESET_STATUS),

	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),

	.clockact	= CLOCKACT_TEST_ICLK,

	.sysc_fields	= &omap_hwmod_sysc_type1,

};
@@ -211,6 +212,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { 
	},

	.dev_attr	= &capability_alwon_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer2 */
@@ -228,6 +230,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { 
		},

	},

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer3 */
@@ -245,6 +248,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { 
		},

	},

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer4 */
@@ -262,6 +266,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { 
		},

	},

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer5 */
@@ -280,6 +285,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { 
	},

	.dev_attr	= &capability_dsp_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer6 */
@@ -298,6 +304,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { 
	},

	.dev_attr	= &capability_dsp_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer7 */
@@ -316,6 +323,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { 
	},

	.dev_attr	= &capability_dsp_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer8 */
@@ -334,6 +342,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { 
	},

	.dev_attr	= &capability_dsp_pwm_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer9 */
@@ -352,6 +361,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { 
	},

	.dev_attr	= &capability_pwm_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer10 */
@@ -370,6 +380,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { 
	},

	.dev_attr	= &capability_pwm_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer11 */
@@ -388,6 +399,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { 
	},

	.dev_attr	= &capability_pwm_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/* timer12 */
@@ -411,6 +423,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = { 
	},

	.dev_attr	= &capability_secure_dev_attr,

	.class		= &omap3xxx_timer_hwmod_class,

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

};



/*

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+4 −0
Original line number Diff line number Diff line
@@ -3067,6 +3067,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = { 
			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |

			   SYSS_HAS_RESET_STATUS),

	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),

	.clockact	= CLOCKACT_TEST_ICLK,

	.sysc_fields	= &omap_hwmod_sysc_type1,

};
@@ -3120,6 +3121,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { 
	.name		= "timer1",

	.class		= &omap44xx_timer_1ms_hwmod_class,

	.clkdm_name	= "l4_wkup_clkdm",

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

	.mpu_irqs	= omap44xx_timer1_irqs,

	.main_clk	= "timer1_fck",

	.prcm = {
@@ -3142,6 +3144,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { 
	.name		= "timer2",

	.class		= &omap44xx_timer_1ms_hwmod_class,

	.clkdm_name	= "l4_per_clkdm",

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

	.mpu_irqs	= omap44xx_timer2_irqs,

	.main_clk	= "timer2_fck",

	.prcm = {
@@ -3316,6 +3319,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { 
	.name		= "timer10",

	.class		= &omap44xx_timer_1ms_hwmod_class,

	.clkdm_name	= "l4_per_clkdm",

	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,

	.mpu_irqs	= omap44xx_timer10_irqs,

	.main_clk	= "timer10_fck",

	.prcm = {

arch/arm/mach-omap2/timer.c

+0 −1
Original line number Diff line number Diff line
@@ -324,7 +324,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, 
		}

	}

	__omap_dm_timer_init_regs(timer);

	__omap_dm_timer_reset(timer, 1, 1);



	if (posted)

		__omap_dm_timer_enable_posted(timer);