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Commit 107177b1 authored by Vineet Gupta's avatar Vineet Gupta
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ARCv2: intc: default all interrupts to priority 1



ARC HS Cores support configurable multiple interrupt priorities of upto
16 levels. In commit dec2b284 ("ARCv2: intc: Allow interruption by
lowest priority interrupt") we switched to 15 which seems a bit
excessive given that there would be rare hardware implementing so many
preemption levels AND running Linux. It would seem that 2 levels will be
more common so switch to 1 as the default priority level. This will be
the "lower" priority level saving 0 for implementing NMI style support.

This scheme also works in systems with more than 2 prioity levels as
well.

Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 78833e79
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+3 −3
Original line number Diff line number Diff line
@@ -38,10 +38,10 @@
#define AUX_IRQ_ACT_BIT_U	31

/*
 * User space should be interruptable even by lowest prio interrupt
 * Safe even if actual interrupt priorities is fewer or even one
 * Hardware supports 16 priorities (0 highest, 15 lowest)
 * Linux by default runs at 1, priority 0 reserved for NMI style interrupts
 */
#define ARCV2_IRQ_DEF_PRIO	15
#define ARCV2_IRQ_DEF_PRIO	1

/* seed value for status register */
#define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | STATUS_AD_MASK | \
+4 −6
Original line number Diff line number Diff line
@@ -14,8 +14,6 @@
#include <linux/irqchip.h>
#include <asm/irq.h>

static int irq_prio;

/*
 * Early Hardware specific Interrupt setup
 * -Called very early (start_kernel -> setup_arch -> setup_processor)
@@ -24,7 +22,7 @@ static int irq_prio;
 */
void arc_init_IRQ(void)
{
	unsigned int tmp;
	unsigned int tmp, irq_prio;

	struct irq_build {
#ifdef CONFIG_CPU_BIG_ENDIAN
@@ -67,12 +65,12 @@ void arc_init_IRQ(void)

	irq_prio = irq_bcr.prio;	/* Encoded as N-1 for N levels */
	pr_info("archs-intc\t: %d priority levels (default %d)%s\n",
		irq_prio + 1, irq_prio,
		irq_prio + 1, ARCV2_IRQ_DEF_PRIO,
		irq_bcr.firq ? " FIRQ (not used)":"");

	/* setup status32, don't enable intr yet as kernel doesn't want */
	tmp = read_aux_reg(0xa);
	tmp |= STATUS_AD_MASK | (irq_prio << 1);
	tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
	tmp &= ~STATUS_IE_MASK;
	asm volatile("kflag %0	\n"::"r"(tmp));
}
@@ -93,7 +91,7 @@ void arcv2_irq_enable(struct irq_data *data)
{
	/* set default priority */
	write_aux_reg(AUX_IRQ_SELECT, data->irq);
	write_aux_reg(AUX_IRQ_PRIORITY, irq_prio);
	write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);

	/*
	 * hw auto enables (linux unmask) all by default