Loading drivers/media/platform/msm/vidc/msm_vdec.c +3 −5 Original line number Diff line number Diff line Loading @@ -67,9 +67,9 @@ static struct msm_vidc_ctrl msm_vdec_ctrls[] = { .id = V4L2_CID_MPEG_VIDEO_UNKNOWN, .name = "Invalid control", .type = V4L2_CTRL_TYPE_INTEGER, .minimum = INT_MAX, .maximum = INT_MAX, .default_value = INT_MAX, .minimum = 0, .maximum = 0, .default_value = 0, .step = 1, .menu_skip_mask = 0, .qmenu = NULL, Loading Loading @@ -835,7 +835,6 @@ int msm_vdec_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) return -EINVAL; } v4l2_ctrl_unlock(ctrl); dprintk(VIDC_DBG, "%s: %x : control name = %s, id = 0x%x value = %d\n", __func__, hash32_ptr(inst->session), ctrl->name, Loading Loading @@ -925,7 +924,6 @@ int msm_vdec_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) "Unknown control %#x\n", ctrl->id); break; } v4l2_ctrl_lock(ctrl); return rc; } Loading drivers/media/platform/msm/vidc/msm_venc.c +3 −11 Original line number Diff line number Diff line Loading @@ -76,9 +76,9 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = { .id = V4L2_CID_MPEG_VIDEO_UNKNOWN, .name = "Invalid control", .type = V4L2_CTRL_TYPE_INTEGER, .minimum = INT_MAX, .maximum = INT_MAX, .default_value = INT_MAX, .minimum = 0, .maximum = 0, .default_value = 0, .step = 1, .menu_skip_mask = 0, .qmenu = NULL, Loading Loading @@ -1399,13 +1399,6 @@ int msm_venc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) mdisp_sei = &(inst->hdr10_sei_params.disp_color_sei); cll_sei = &(inst->hdr10_sei_params.cll_sei); /* * Unlock the control prior to setting to the hardware. Otherwise * lower level code that attempts to do a get_ctrl() will end up * deadlocking. */ v4l2_ctrl_unlock(ctrl); dprintk(VIDC_DBG, "%s: %x : name %s, id 0x%x value %d\n", __func__, hash32_ptr(inst->session), ctrl->name, Loading Loading @@ -1750,7 +1743,6 @@ int msm_venc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) break; } v4l2_ctrl_lock(ctrl); return rc; } Loading drivers/media/platform/msm/vidc/msm_vidc_clocks.c +24 −32 Original line number Diff line number Diff line Loading @@ -315,17 +315,17 @@ int msm_comm_vote_bus(struct msm_vidc_core *core) vote_data[i].input_height = inst->prop.height[OUTPUT_PORT]; vote_data[i].output_width = inst->prop.width[CAPTURE_PORT]; vote_data[i].output_height = inst->prop.height[CAPTURE_PORT]; vote_data[i].rotation = msm_comm_g_ctrl_for_id(inst, V4L2_CID_ROTATE); vote_data[i].lcu_size = (codec == V4L2_PIX_FMT_HEVC || codec == V4L2_PIX_FMT_VP9) ? 32 : 16; vote_data[i].b_frames_enabled = msm_comm_g_ctrl_for_id(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES) != 0; vote_data[i].fps = msm_vidc_get_fps(inst); if (inst->session_type == MSM_VIDC_ENCODER) { vote_data[i].bitrate = inst->clk_data.bitrate; vote_data[i].rotation = msm_comm_g_ctrl_for_id(inst, V4L2_CID_ROTATE); vote_data[i].b_frames_enabled = msm_comm_g_ctrl_for_id(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES) != 0; /* scale bitrate if operating rate is larger than fps */ if (vote_data[i].fps > (inst->clk_data.frame_rate >> 16) && (inst->clk_data.frame_rate >> 16)) { Loading Loading @@ -1682,7 +1682,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) struct hfi_videocores_usage_type core_info; u32 core0_load = 0, core1_load = 0, core0_lp_load = 0, core1_lp_load = 0; u32 current_inst_load = 0, current_inst_lp_load = 0, u32 current_inst_load = 0, cur_inst_lp_load = 0, min_load = 0, min_lp_load = 0; u32 min_core_id, min_lp_core_id; Loading Loading @@ -1727,7 +1727,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) current_inst_load = (msm_comm_get_inst_load(inst, LOAD_CALC_NO_QUIRKS) * inst->clk_data.entry->vpp_cycles)/inst->clk_data.work_route; current_inst_lp_load = (msm_comm_get_inst_load(inst, cur_inst_lp_load = (msm_comm_get_inst_load(inst, LOAD_CALC_NO_QUIRKS) * lp_cycles)/inst->clk_data.work_route; dprintk(VIDC_DBG, "Core 0 RT Load = %d Core 1 RT Load = %d\n", Loading @@ -1736,40 +1736,32 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) core0_lp_load, core1_lp_load); dprintk(VIDC_DBG, "Max Load = %lu\n", max_freq); dprintk(VIDC_DBG, "Current Load = %d Current LP Load = %d\n", current_inst_load, current_inst_lp_load); current_inst_load, cur_inst_lp_load); if (inst->session_type == MSM_VIDC_ENCODER) { /* Hier mode can be normal HP or Hybrid HP. */ u32 max_cores, work_mode; hier_mode = msm_comm_g_ctrl_for_id(inst, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER); /* Try for preferred core based on settings. */ if (inst->session_type == MSM_VIDC_ENCODER && hier_mode && inst->capability.cap[CAP_MAX_VIDEOCORES].max >= VIDC_CORE_ID_3) { max_cores = inst->capability.cap[CAP_MAX_VIDEOCORES].max; work_mode = inst->clk_data.work_mode; if (hier_mode && max_cores >= VIDC_CORE_ID_3 && work_mode == HFI_WORKMODE_2) { if (current_inst_load / 2 + core0_load <= max_freq && current_inst_load / 2 + core1_load <= max_freq) { if (inst->clk_data.work_mode == HFI_WORKMODE_2) { inst->clk_data.core_id = VIDC_CORE_ID_3; msm_vidc_power_save_mode_enable(inst, false); goto decision_done; } } } if (inst->session_type == MSM_VIDC_ENCODER && hier_mode && inst->capability.cap[CAP_MAX_VIDEOCORES].max >= VIDC_CORE_ID_3) { if (current_inst_lp_load / 2 + core0_lp_load <= max_freq && current_inst_lp_load / 2 + core1_lp_load <= max_freq) { if (inst->clk_data.work_mode == HFI_WORKMODE_2) { if (cur_inst_lp_load / 2 + core0_lp_load <= max_freq && cur_inst_lp_load / 2 + core1_lp_load <= max_freq) { inst->clk_data.core_id = VIDC_CORE_ID_3; msm_vidc_power_save_mode_enable(inst, true); goto decision_done; } } } if (current_inst_load + min_load < max_freq) { Loading @@ -1778,7 +1770,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) "Selected normally : Core ID = %d\n", inst->clk_data.core_id); msm_vidc_power_save_mode_enable(inst, false); } else if (current_inst_lp_load + min_load < max_freq) { } else if (cur_inst_lp_load + min_load < max_freq) { /* Move current instance to LP and return */ inst->clk_data.core_id = min_core_id; dprintk(VIDC_DBG, Loading @@ -1786,7 +1778,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) inst->clk_data.core_id); msm_vidc_power_save_mode_enable(inst, true); } else if (current_inst_lp_load + min_lp_load < max_freq) { } else if (cur_inst_lp_load + min_lp_load < max_freq) { /* Move all instances to LP mode and return */ inst->clk_data.core_id = min_lp_core_id; dprintk(VIDC_DBG, Loading drivers/media/platform/msm/vidc/msm_vidc_common.c +3 −6 Original line number Diff line number Diff line Loading @@ -96,13 +96,10 @@ int vp9_level_v4l2_to_hfi[] = { int msm_comm_g_ctrl_for_id(struct msm_vidc_inst *inst, int id) { int rc = 0; struct v4l2_control ctrl = { .id = id, }; struct v4l2_ctrl *ctrl; rc = msm_comm_g_ctrl(inst, &ctrl); return rc ? rc : ctrl.value; ctrl = get_ctrl(inst, id); return ctrl->val; } static struct v4l2_ctrl **get_super_cluster(struct msm_vidc_inst *inst, Loading Loading
drivers/media/platform/msm/vidc/msm_vdec.c +3 −5 Original line number Diff line number Diff line Loading @@ -67,9 +67,9 @@ static struct msm_vidc_ctrl msm_vdec_ctrls[] = { .id = V4L2_CID_MPEG_VIDEO_UNKNOWN, .name = "Invalid control", .type = V4L2_CTRL_TYPE_INTEGER, .minimum = INT_MAX, .maximum = INT_MAX, .default_value = INT_MAX, .minimum = 0, .maximum = 0, .default_value = 0, .step = 1, .menu_skip_mask = 0, .qmenu = NULL, Loading Loading @@ -835,7 +835,6 @@ int msm_vdec_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) return -EINVAL; } v4l2_ctrl_unlock(ctrl); dprintk(VIDC_DBG, "%s: %x : control name = %s, id = 0x%x value = %d\n", __func__, hash32_ptr(inst->session), ctrl->name, Loading Loading @@ -925,7 +924,6 @@ int msm_vdec_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) "Unknown control %#x\n", ctrl->id); break; } v4l2_ctrl_lock(ctrl); return rc; } Loading
drivers/media/platform/msm/vidc/msm_venc.c +3 −11 Original line number Diff line number Diff line Loading @@ -76,9 +76,9 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = { .id = V4L2_CID_MPEG_VIDEO_UNKNOWN, .name = "Invalid control", .type = V4L2_CTRL_TYPE_INTEGER, .minimum = INT_MAX, .maximum = INT_MAX, .default_value = INT_MAX, .minimum = 0, .maximum = 0, .default_value = 0, .step = 1, .menu_skip_mask = 0, .qmenu = NULL, Loading Loading @@ -1399,13 +1399,6 @@ int msm_venc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) mdisp_sei = &(inst->hdr10_sei_params.disp_color_sei); cll_sei = &(inst->hdr10_sei_params.cll_sei); /* * Unlock the control prior to setting to the hardware. Otherwise * lower level code that attempts to do a get_ctrl() will end up * deadlocking. */ v4l2_ctrl_unlock(ctrl); dprintk(VIDC_DBG, "%s: %x : name %s, id 0x%x value %d\n", __func__, hash32_ptr(inst->session), ctrl->name, Loading Loading @@ -1750,7 +1743,6 @@ int msm_venc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) break; } v4l2_ctrl_lock(ctrl); return rc; } Loading
drivers/media/platform/msm/vidc/msm_vidc_clocks.c +24 −32 Original line number Diff line number Diff line Loading @@ -315,17 +315,17 @@ int msm_comm_vote_bus(struct msm_vidc_core *core) vote_data[i].input_height = inst->prop.height[OUTPUT_PORT]; vote_data[i].output_width = inst->prop.width[CAPTURE_PORT]; vote_data[i].output_height = inst->prop.height[CAPTURE_PORT]; vote_data[i].rotation = msm_comm_g_ctrl_for_id(inst, V4L2_CID_ROTATE); vote_data[i].lcu_size = (codec == V4L2_PIX_FMT_HEVC || codec == V4L2_PIX_FMT_VP9) ? 32 : 16; vote_data[i].b_frames_enabled = msm_comm_g_ctrl_for_id(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES) != 0; vote_data[i].fps = msm_vidc_get_fps(inst); if (inst->session_type == MSM_VIDC_ENCODER) { vote_data[i].bitrate = inst->clk_data.bitrate; vote_data[i].rotation = msm_comm_g_ctrl_for_id(inst, V4L2_CID_ROTATE); vote_data[i].b_frames_enabled = msm_comm_g_ctrl_for_id(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES) != 0; /* scale bitrate if operating rate is larger than fps */ if (vote_data[i].fps > (inst->clk_data.frame_rate >> 16) && (inst->clk_data.frame_rate >> 16)) { Loading Loading @@ -1682,7 +1682,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) struct hfi_videocores_usage_type core_info; u32 core0_load = 0, core1_load = 0, core0_lp_load = 0, core1_lp_load = 0; u32 current_inst_load = 0, current_inst_lp_load = 0, u32 current_inst_load = 0, cur_inst_lp_load = 0, min_load = 0, min_lp_load = 0; u32 min_core_id, min_lp_core_id; Loading Loading @@ -1727,7 +1727,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) current_inst_load = (msm_comm_get_inst_load(inst, LOAD_CALC_NO_QUIRKS) * inst->clk_data.entry->vpp_cycles)/inst->clk_data.work_route; current_inst_lp_load = (msm_comm_get_inst_load(inst, cur_inst_lp_load = (msm_comm_get_inst_load(inst, LOAD_CALC_NO_QUIRKS) * lp_cycles)/inst->clk_data.work_route; dprintk(VIDC_DBG, "Core 0 RT Load = %d Core 1 RT Load = %d\n", Loading @@ -1736,40 +1736,32 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) core0_lp_load, core1_lp_load); dprintk(VIDC_DBG, "Max Load = %lu\n", max_freq); dprintk(VIDC_DBG, "Current Load = %d Current LP Load = %d\n", current_inst_load, current_inst_lp_load); current_inst_load, cur_inst_lp_load); if (inst->session_type == MSM_VIDC_ENCODER) { /* Hier mode can be normal HP or Hybrid HP. */ u32 max_cores, work_mode; hier_mode = msm_comm_g_ctrl_for_id(inst, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER); /* Try for preferred core based on settings. */ if (inst->session_type == MSM_VIDC_ENCODER && hier_mode && inst->capability.cap[CAP_MAX_VIDEOCORES].max >= VIDC_CORE_ID_3) { max_cores = inst->capability.cap[CAP_MAX_VIDEOCORES].max; work_mode = inst->clk_data.work_mode; if (hier_mode && max_cores >= VIDC_CORE_ID_3 && work_mode == HFI_WORKMODE_2) { if (current_inst_load / 2 + core0_load <= max_freq && current_inst_load / 2 + core1_load <= max_freq) { if (inst->clk_data.work_mode == HFI_WORKMODE_2) { inst->clk_data.core_id = VIDC_CORE_ID_3; msm_vidc_power_save_mode_enable(inst, false); goto decision_done; } } } if (inst->session_type == MSM_VIDC_ENCODER && hier_mode && inst->capability.cap[CAP_MAX_VIDEOCORES].max >= VIDC_CORE_ID_3) { if (current_inst_lp_load / 2 + core0_lp_load <= max_freq && current_inst_lp_load / 2 + core1_lp_load <= max_freq) { if (inst->clk_data.work_mode == HFI_WORKMODE_2) { if (cur_inst_lp_load / 2 + core0_lp_load <= max_freq && cur_inst_lp_load / 2 + core1_lp_load <= max_freq) { inst->clk_data.core_id = VIDC_CORE_ID_3; msm_vidc_power_save_mode_enable(inst, true); goto decision_done; } } } if (current_inst_load + min_load < max_freq) { Loading @@ -1778,7 +1770,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) "Selected normally : Core ID = %d\n", inst->clk_data.core_id); msm_vidc_power_save_mode_enable(inst, false); } else if (current_inst_lp_load + min_load < max_freq) { } else if (cur_inst_lp_load + min_load < max_freq) { /* Move current instance to LP and return */ inst->clk_data.core_id = min_core_id; dprintk(VIDC_DBG, Loading @@ -1786,7 +1778,7 @@ int msm_vidc_decide_core_and_power_mode(struct msm_vidc_inst *inst) inst->clk_data.core_id); msm_vidc_power_save_mode_enable(inst, true); } else if (current_inst_lp_load + min_lp_load < max_freq) { } else if (cur_inst_lp_load + min_lp_load < max_freq) { /* Move all instances to LP mode and return */ inst->clk_data.core_id = min_lp_core_id; dprintk(VIDC_DBG, Loading
drivers/media/platform/msm/vidc/msm_vidc_common.c +3 −6 Original line number Diff line number Diff line Loading @@ -96,13 +96,10 @@ int vp9_level_v4l2_to_hfi[] = { int msm_comm_g_ctrl_for_id(struct msm_vidc_inst *inst, int id) { int rc = 0; struct v4l2_control ctrl = { .id = id, }; struct v4l2_ctrl *ctrl; rc = msm_comm_g_ctrl(inst, &ctrl); return rc ? rc : ctrl.value; ctrl = get_ctrl(inst, id); return ctrl->val; } static struct v4l2_ctrl **get_super_cluster(struct msm_vidc_inst *inst, Loading