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Commit 0f966aaf authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Remove posting-read for forcewake put 



We can relax the requirement upon ourselves that the forcewake is
released immediately and just allow it to occur naturally following our
mmio request.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170323101944.21627-5-chris@chris-wilson.co.uk
parent d2dc94bc

drivers/gpu/drm/i915/i915_drv.h

+0 −1
Original line number Diff line number Diff line
@@ -783,7 +783,6 @@ struct intel_uncore { 
		u32 val_set;

		u32 val_clear;

		i915_reg_t reg_ack;

		i915_reg_t reg_post;

		u32 val_reset;

	} fw_domain[FW_DOMAIN_ID_COUNT];

drivers/gpu/drm/i915/intel_uncore.c

+1 −32
Original line number Diff line number Diff line
@@ -105,15 +105,6 @@ fw_domain_put(struct drm_i915_private *i915, 
	__raw_i915_write32(i915, d->reg_set, d->val_clear);

}



static inline void

fw_domain_posting_read(struct drm_i915_private *i915,

		       const struct intel_uncore_forcewake_domain *d)

{

	/* something from same cacheline, but not from the set register */

	if (i915_mmio_reg_valid(d->reg_post))

		__raw_posting_read(i915, d->reg_post);

}



static void

fw_domains_get(struct drm_i915_private *i915, enum forcewake_domains fw_domains)

{
@@ -141,27 +132,12 @@ fw_domains_put(struct drm_i915_private *i915, enum forcewake_domains fw_domains) 


	GEM_BUG_ON(fw_domains & ~i915->uncore.fw_domains);



	for_each_fw_domain_masked(d, fw_domains, i915, tmp) {

	for_each_fw_domain_masked(d, fw_domains, i915, tmp)

		fw_domain_put(i915, d);

		fw_domain_posting_read(i915, d);

	}



	i915->uncore.fw_domains_active &= ~fw_domains;

}



static void

fw_domains_posting_read(struct drm_i915_private *i915)

{

	struct intel_uncore_forcewake_domain *d;

	unsigned int tmp;



	/* No need to do for all, just do for first found */

	for_each_fw_domain(d, i915, tmp) {

		fw_domain_posting_read(i915, d);

		break;

	}

}



static void

fw_domains_reset(struct drm_i915_private *i915,

		 enum forcewake_domains fw_domains)
@@ -176,8 +152,6 @@ fw_domains_reset(struct drm_i915_private *i915, 


	for_each_fw_domain_masked(d, fw_domains, i915, tmp)

		fw_domain_reset(i915, d);



	fw_domains_posting_read(i915);

}



static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
@@ -1180,11 +1154,6 @@ static void fw_domain_init(struct drm_i915_private *dev_priv, 
		d->val_clear = _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL);

	}



	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))

		d->reg_post = FORCEWAKE_ACK_VLV;

	else if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv) || IS_GEN8(dev_priv))

		d->reg_post = ECOBUS;



	d->id = domain_id;



	BUILD_BUG_ON(FORCEWAKE_RENDER != (1 << FW_DOMAIN_ID_RENDER));