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This patch is only relevant for RTC with the SQ_ALT feature which means the clock output frequency divider is stored in the weekday register. Current implementation discards the previous dividers value and clear them as soon as the time is set. Signed-off-by:Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com>