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Commit 0f43563f authored by Will Deacon's avatar Will Deacon
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ARM: s5pv310: update IRQ combiner to use chained entry/exit functions 



This patch updates the IRQ combiner chained IRQ handler code to use the
chained IRQ enter/exit functions in order to function correctly on
primary controllers with different methods of flow control.

This is required for the GIC to move to fasteoi interrupt handling.

Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent ee144182

arch/arm/mach-exynos4/irq-combiner.c

+2 −4
Original line number Diff line number Diff line
@@ -59,8 +59,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 
	unsigned int cascade_irq, combiner_irq;

	unsigned long status;



	/* primary controller ack'ing */

	chip->irq_ack(&desc->irq_data);

	chained_irq_enter(chip, desc);



	spin_lock(&irq_controller_lock);

	status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
@@ -79,8 +78,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 
		generic_handle_irq(cascade_irq);



 out:

	/* primary controller unmasking */

	chip->irq_unmask(&desc->irq_data);

	chained_irq_exit(chip, desc);

}



static struct irq_chip combiner_chip = {