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Commit 0f239f4c authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: Filter gmch fifo underruns in the shared handler 



This simplifies the code in the vlv irq handler. Also this now
means that we correctly filter underruns on gen2-4.

And as the real upshot I need to document one less function for
the fifo underrun code.

v2: Shorten one long line.

Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 1f7247c0

drivers/gpu/drm/i915/i915_irq.c

+3 −3
Original line number Diff line number Diff line
@@ -1749,9 +1749,9 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir) 
		 * we need to be careful that we only handle what we want to

		 * handle.

		 */

		mask = 0;

		if (__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))

			mask |= PIPE_FIFO_UNDERRUN_STATUS;



		/* fifo underruns are filterered in the underrun handler. */

		mask = PIPE_FIFO_UNDERRUN_STATUS;



		switch (pipe) {

		case PIPE_A:

drivers/gpu/drm/i915/intel_drv.h

+0 −2
Original line number Diff line number Diff line
@@ -766,8 +766,6 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, 
void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,

					 enum transcoder pch_transcoder);

void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv);

bool __cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,

					   enum pipe pipe);



/* i915_irq.c */

void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);

drivers/gpu/drm/i915/intel_fifo_underrun.c

+8 −2
Original line number Diff line number Diff line
@@ -252,7 +252,8 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv, 
	return ret;

}



bool __cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,

static bool

__cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,

				      enum pipe pipe)

{

	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
@@ -312,6 +313,11 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, 
void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,

					 enum pipe pipe)

{

	/* GMCH can't disable fifo underruns, filter them. */

	if (HAS_GMCH_DISPLAY(dev_priv->dev) &&

	    !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe))

		return;



	if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))

		DRM_ERROR("CPU pipe %c FIFO underrun\n",

			  pipe_name(pipe));