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Commit 0e84faa1 authored by Sascha Hauer's avatar Sascha Hauer Committed by Matthias Brugger
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arm64: dts: mt8173: Use real clock for UARTs 



We used to use a fixed rate clock for the UARTs. Now that we have clock
support we can associate the correct clocks to the UARTs and drop the
26MHz fixed rate UART clock.

Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent f2ce7014

arch/arm64/boot/dts/mediatek/mt8173.dtsi

+8 −10
Original line number Diff line number Diff line
@@ -82,12 +82,6 @@ 
		cpu_on	      = <0x84000003>;

	};



	uart_clk: dummy26m {

		compatible = "fixed-clock";

		clock-frequency = <26000000>;

		#clock-cells = <0>;

	};



	clk26m: oscillator@0 {

		compatible = "fixed-clock";

		#clock-cells = <0>;
@@ -198,7 +192,8 @@ 
				     "mediatek,mt6577-uart";

			reg = <0 0x11002000 0 0x400>;

			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;

			clock-names = "baud", "bus";

			status = "disabled";

		};
@@ -207,7 +202,8 @@ 
				     "mediatek,mt6577-uart";

			reg = <0 0x11003000 0 0x400>;

			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;

			clock-names = "baud", "bus";

			status = "disabled";

		};
@@ -216,7 +212,8 @@ 
				     "mediatek,mt6577-uart";

			reg = <0 0x11004000 0 0x400>;

			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;

			clock-names = "baud", "bus";

			status = "disabled";

		};
@@ -225,7 +222,8 @@ 
				     "mediatek,mt6577-uart";

			reg = <0 0x11005000 0 0x400>;

			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;

			clock-names = "baud", "bus";

			status = "disabled";

		};

	};