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Commit 0e1a77cc authored by Isaku Yamahata's avatar Isaku Yamahata Committed by Tony Luck
Browse files

[IA64] pvops: preparation: introduce ia64_set_rr0_to_rr4() to make kernel...


[IA64] pvops: preparation: introduce ia64_set_rr0_to_rr4() to make kernel paravirtualization friendly.

make kernel paravirtualization friendly by introducing
ia64_set_rr0_to_rr4().
ia64/Xen will replace setting rr[0-4] with single hypercall later.

Signed-off-by: default avatarIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent 8311d21c
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+9 −0
Original line number Original line Diff line number Diff line
@@ -18,6 +18,15 @@
# include <asm/gcc_intrin.h>
# include <asm/gcc_intrin.h>
#endif
#endif


#define ia64_set_rr0_to_rr4(val0, val1, val2, val3, val4)	\
do {								\
	ia64_set_rr(0x0000000000000000UL, (val0));		\
	ia64_set_rr(0x2000000000000000UL, (val1));		\
	ia64_set_rr(0x4000000000000000UL, (val2));		\
	ia64_set_rr(0x6000000000000000UL, (val3));		\
	ia64_set_rr(0x8000000000000000UL, (val4));		\
} while (0)

/*
/*
 * Force an unresolved reference if someone tries to use
 * Force an unresolved reference if someone tries to use
 * ia64_fetch_and_add() with a bad value.
 * ia64_fetch_and_add() with a bad value.
+1 −5
Original line number Original line Diff line number Diff line
@@ -152,11 +152,7 @@ reload_context (nv_mm_context_t context)
#  endif
#  endif
#endif
#endif


	ia64_set_rr(0x0000000000000000UL, rr0);
	ia64_set_rr0_to_rr4(rr0, rr1, rr2, rr3, rr4);
	ia64_set_rr(0x2000000000000000UL, rr1);
	ia64_set_rr(0x4000000000000000UL, rr2);
	ia64_set_rr(0x6000000000000000UL, rr3);
	ia64_set_rr(0x8000000000000000UL, rr4);
	ia64_srlz_i();			/* srlz.i implies srlz.d */
	ia64_srlz_i();			/* srlz.i implies srlz.d */
}
}