Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0e17de4e authored by Amit Mehta's avatar Amit Mehta Committed by Ravindra Konda
Browse files

fw-api: Add REO2SW1 ring status address to peach and kiwi 

Add REO2SW1 ring status address to peach and kiwi

Change-Id: I54ea9c8eebbc90f5ce58bb888d4053433f043b0d
CRs-Fixed: 3948871
parent 61c97bef

hw/kiwi/v1/wcss_seq_hwioreg_umac.h

+6 −1
Original line number Diff line number Diff line 


/*

 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2021,2024 Qualcomm Innovation Center, Inc. All rights reserved.

 *

 * Permission to use, copy, modify, and/or distribute this software for

 * any purpose with or without fee is hereby granted, provided that the
@@ -386,6 +386,11 @@ 
#define HWIO_WBM_R2_WBM2SW1_RELEASE_RING_HP_ADDR(x)                                                             ((x) + 0x30d0)

#define HWIO_WBM_R0_WBM2SW0_RELEASE_RING_BASE_MSB_RING_SIZE_BMSK                                                 0xfffff00

#define HWIO_WBM_R0_WBM2SW0_RELEASE_RING_BASE_MSB_RING_SIZE_SHFT                                                         8

#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x)                                                            ((x) + 0x3b0)

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK                                                0xffff0000

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT                                                        16

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK                                                    0xffff

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT                                                         0

#define HWIO_REO_R0_REO2SW1_RING_MSI2_BASE_LSB_ADDR(x)                                                     ((x) + 0x3fc)

#define HWIO_REO_R0_REO2SW1_RING_MSI2_BASE_MSB_ADDR(x)                                                     ((x) + 0x400)

#define HWIO_REO_R0_REO2SW1_RING_MSI2_DATA_ADDR(x)                                                         ((x) + 0x404)

hw/kiwi/v2/wcss_seq_hwioreg_umac.h

+6 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.

 *

 * Permission to use, copy, modify, and/or distribute this software for

 * any purpose with or without fee is hereby granted, provided that the
@@ -224,6 +224,11 @@ 
#define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_BMSK                                                    0xfffff00

#define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_SHFT                                                            8

#define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x)                                                                ((x) + 0x4ec)

#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x)                                                            ((x) + 0x4f0)

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK                                                0xffff0000

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT                                                        16

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK                                                    0xffff

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT                                                         0

#define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x)                                                              ((x) + 0x4f4)

#define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x)                                                       ((x) + 0x4f8)

#define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x)                                                       ((x) + 0x4fc)

hw/peach/v1/wcss_seq_hwioreg_umac.h

+6 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.

 *

 * Permission to use, copy, modify, and/or distribute this software for any

 * purpose with or without fee is hereby granted, provided that the above
@@ -794,6 +794,11 @@ 
#define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_BMSK                                                                0xfffff00

#define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_SHFT                                                                        8

#define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x)                                                                            ((x) + 0x508)

#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x)                                                                        ((x) + 0x50c)

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK                                                           0xffff0000

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT                                                                   16

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK                                                               0xffff

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT                                                                    0

#define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x)                                                                          ((x) + 0x510)

#define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_BMSK                                                             0x8000000

#define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_SHFT                                                                    27

hw/peach/v2/wcss_seq_hwioreg_umac.h

+5 −0
Original line number Diff line number Diff line
@@ -797,6 +797,11 @@ 
#define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x)                                                                          ((x) + 0x510)

#define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_BMSK                                                             0x8000000

#define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_SHFT                                                                    27

#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x)                                                                        ((x) + 0x50c)

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK                                                           0xffff0000

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT                                                                   16

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK                                                               0xffff

#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT                                                                    0

#define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x)                                                                   ((x) + 0x514)

#define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x)                                                                   ((x) + 0x518)

#define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x)                                                            ((x) + 0x524)