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Commit 0de9136d authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/scheduler: Signal the arrival of a new request 



The start of the scheduler, add a hook into request submission for the
scheduler to see the arrival of new requests and prepare its runqueues.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161114204105.29171-6-chris@chris-wilson.co.uk
parent 663f71e7

drivers/gpu/drm/i915/i915_drv.c

+4 −0
Original line number Diff line number Diff line
@@ -323,6 +323,10 @@ static int i915_getparam(struct drm_device *dev, void *data, 
		 */

		value = i915_gem_mmap_gtt_version();

		break;

	case I915_PARAM_HAS_SCHEDULER:

		value = dev_priv->engine[RCS] &&

			dev_priv->engine[RCS]->schedule;

		break;

	case I915_PARAM_MMAP_VERSION:

		/* Remember to bump this if the version changes! */

	case I915_PARAM_HAS_GEM:

drivers/gpu/drm/i915/i915_gem_request.c

+13 −0
Original line number Diff line number Diff line
@@ -762,6 +762,19 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches) 


	i915_gem_mark_busy(engine);



	/* Let the backend know a new request has arrived that may need

	 * to adjust the existing execution schedule due to a high priority

	 * request - i.e. we may want to preempt the current request in order

	 * to run a high priority dependency chain *before* we can execute this

	 * request.

	 *

	 * This is called before the request is ready to run so that we can

	 * decide whether to preempt the entire chain so that it is ready to

	 * run at the earliest possible convenience.

	 */

	if (engine->schedule)

		engine->schedule(request, 0);



	local_bh_disable();

	i915_sw_fence_commit(&request->submit);

	local_bh_enable(); /* Kick the execlists tasklet if just scheduled */

drivers/gpu/drm/i915/intel_engine_cs.c

+3 −0
Original line number Diff line number Diff line
@@ -102,6 +102,9 @@ intel_engine_setup(struct drm_i915_private *dev_priv, 
	engine->mmio_base = info->mmio_base;

	engine->irq_shift = info->irq_shift;



	/* Nothing to do here, execute in order of dependencies */

	engine->schedule = NULL;



	dev_priv->engine[id] = engine;

	return 0;

}

drivers/gpu/drm/i915/intel_ringbuffer.h

+9 −0
Original line number Diff line number Diff line
@@ -267,6 +267,15 @@ struct intel_engine_cs { 
	 */

	void		(*submit_request)(struct drm_i915_gem_request *req);



	/* Call when the priority on a request has changed and it and its

	 * dependencies may need rescheduling. Note the request itself may

	 * not be ready to run!

	 *

	 * Called under the struct_mutex.

	 */

	void		(*schedule)(struct drm_i915_gem_request *request,

				    int priority);



	/* Some chipsets are not quite as coherent as advertised and need

	 * an expensive kick to force a true read of the up-to-date seqno.

	 * However, the up-to-date seqno is not always required and the last

include/uapi/drm/i915_drm.h

+5 −0
Original line number Diff line number Diff line
@@ -389,6 +389,11 @@ typedef struct drm_i915_irq_wait { 
#define I915_PARAM_MIN_EU_IN_POOL	 39

#define I915_PARAM_MMAP_GTT_VERSION	 40



/* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution

 * priorities and the driver will attempt to execute batches in priority order.

 */

#define I915_PARAM_HAS_SCHEDULER	 41



typedef struct drm_i915_getparam {

	__s32 param;

	/*