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Commit 0d9f8217 authored by Shawn Guo's avatar Shawn Guo
Browse files

ARM: mxs: move display timing configurations into device tree



Move display timing configurations into device tree, so that the
auxdata for mxsfb driver can be killed.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 66940653
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+25 −0
Original line number Diff line number Diff line
@@ -60,7 +60,32 @@
				pinctrl-names = "default";
				pinctrl-0 = <&lcdif_24bit_pins_a>;
				panel-enable-gpios = <&gpio1 18 0>;
				display = <&display>;
				status = "okay";

				display: display {
					bits-per-pixel = <32>;
					bus-width = <24>;

					display-timings {
						native-mode = <&timing0>;
						timing0: timing0 {
							clock-frequency = <9200000>;
							hactive = <480>;
							vactive = <272>;
							hback-porch = <15>;
							hfront-porch = <8>;
							vback-porch = <12>;
							vfront-porch = <4>;
							hsync-len = <1>;
							vsync-len = <1>;
							hsync-active = <0>;
							vsync-active = <0>;
							de-active = <1>;
							pixelclk-active = <0>;
						};
					};
				};
			};
		};

+25 −0
Original line number Diff line number Diff line
@@ -72,7 +72,32 @@
				pinctrl-names = "default";
				pinctrl-0 = <&lcdif_16bit_pins_a
						&lcdif_pins_apf28dev>;
				display = <&display>;
				status = "okay";

				display: display {
					bits-per-pixel = <16>;
					bus-width = <16>;

					display-timings {
						native-mode = <&timing0>;
						timing0: timing0 {
							clock-frequency = <33000033>;
							hactive = <800>;
							vactive = <480>;
							hback-porch = <96>;
							hfront-porch = <96>;
							vback-porch = <20>;
							vfront-porch = <21>;
							hsync-len = <64>;
							vsync-len = <4>;
							hsync-active = <1>;
							vsync-active = <1>;
							de-active = <1>;
							pixelclk-active = <0>;
						};
					};
				};
			};
		};

+25 −0
Original line number Diff line number Diff line
@@ -94,7 +94,32 @@
				pinctrl-names = "default";
				pinctrl-0 = <&lcdif_24bit_pins_a
					     &lcdif_pins_apx4>;
				display = <&display>;
				status = "okay";

				display: display {
					bits-per-pixel = <32>;
					bus-width = <24>;

					display-timings {
						native-mode = <&timing0>;
						timing0: timing0 {
							clock-frequency = <30000000>;
							hactive = <800>;
							vactive = <480>;
							hback-porch = <88>;
							hfront-porch = <40>;
							vback-porch = <32>;
							vfront-porch = <13>;
							hsync-len = <48>;
							vsync-len = <3>;
							hsync-active = <1>;
							vsync-active = <1>;
							de-active = <1>;
							pixelclk-active = <0>;
						};
					};
				};
			};
		};

+25 −0
Original line number Diff line number Diff line
@@ -126,7 +126,32 @@
				pinctrl-names = "default";
				pinctrl-0 = <&lcdif_18bit_pins_cfa10049
					     &lcdif_pins_cfa10049>;
				display = <&display>;
				status = "okay";

				display: display {
					bits-per-pixel = <32>;
					bus-width = <18>;

					display-timings {
						native-mode = <&timing0>;
						timing0: timing0 {
							clock-frequency = <9216000>;
							hactive = <320>;
							vactive = <480>;
							hback-porch = <2>;
							hfront-porch = <2>;
							vback-porch = <2>;
							vfront-porch = <2>;
							hsync-len = <15>;
							vsync-len = <15>;
							hsync-active = <0>;
							vsync-active = <0>;
							de-active = <1>;
							pixelclk-active = <1>;
						};
					};
				};
			};
		};

+25 −0
Original line number Diff line number Diff line
@@ -124,7 +124,32 @@
				pinctrl-0 = <&lcdif_24bit_pins_a
					     &lcdif_pins_evk>;
				panel-enable-gpios = <&gpio3 30 0>;
				display = <&display>;
				status = "okay";

				display: display {
					bits-per-pixel = <32>;
					bus-width = <24>;

					display-timings {
						native-mode = <&timing0>;
						timing0: timing0 {
							clock-frequency = <33500000>;
							hactive = <800>;
							vactive = <480>;
							hback-porch = <89>;
							hfront-porch = <164>;
							vback-porch = <23>;
							vfront-porch = <10>;
							hsync-len = <10>;
							vsync-len = <10>;
							hsync-active = <0>;
							vsync-active = <0>;
							de-active = <1>;
							pixelclk-active = <0>;
						};
					};
				};
			};

			can0: can@80032000 {
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