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Commit 0d0abd89 authored by Yakir Yang's avatar Yakir Yang
Browse files

drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 



There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.

Tested-by: default avatarCaesar Wang <wxt@rock-chips.com>
Tested-by: default avatarDouglas Anderson <dianders@chromium.org>
Tested-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarYakir Yang <ykk@rock-chips.com>
parent bcec20fd

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

+21 −12
Original line number Original line Diff line number Diff line
@@ -893,8 +893,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp) 
		return;

		return;

	}

	}





	ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,

	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,

					 dp->video_info.link_rate);

					 dp->video_info.max_link_rate);

	if (ret) {

	if (ret) {

		dev_err(dp->dev, "unable to do link train\n");

		dev_err(dp->dev, "unable to do link train\n");

		return;

		return;
@@ -1203,16 +1203,25 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp) 
	struct device_node *dp_node = dp->dev->of_node;

	struct device_node *dp_node = dp->dev->of_node;

	struct video_info *video_info = &dp->video_info;

	struct video_info *video_info = &dp->video_info;





	if (of_property_read_u32(dp_node, "samsung,link-rate",

	switch (dp->plat_data->dev_type) {

				 &video_info->link_rate)) {

	case RK3288_DP:

		dev_err(dp->dev, "failed to get link-rate\n");

		/*

		return -EINVAL;

		 * Like Rk3288 DisplayPort TRM indicate that "Main link

	}

		 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".



		 */

	if (of_property_read_u32(dp_node, "samsung,lane-count",

		video_info->max_link_rate = 0x0A;

				 &video_info->lane_count)) {

		video_info->max_lane_count = 0x04;

		dev_err(dp->dev, "failed to get lane-count\n");

		break;

		return -EINVAL;

	case EXYNOS_DP:

		/*

		 * NOTE: those property parseing code is used for

		 * providing backward compatibility for samsung platform.

		 */

		of_property_read_u32(dp_node, "samsung,link-rate",

				     &video_info->max_link_rate);

		of_property_read_u32(dp_node, "samsung,lane-count",

				     &video_info->max_lane_count);

		break;

	}

	}





	return 0;

	return 0;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -123,8 +123,8 @@ struct video_info { 
	enum color_coefficient ycbcr_coeff;

	enum color_coefficient ycbcr_coeff;

	enum color_depth color_depth;

	enum color_depth color_depth;





	int link_rate;

	int max_link_rate;

	enum link_lane_count_type lane_count;

	enum link_lane_count_type max_lane_count;

};

};





struct link_train {

struct link_train {