Loading drivers/spi/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -612,7 +612,7 @@ config SPI_XTENSA_XTFPGA config SPI_ZYNQMP_GQSPI tristate "Xilinx ZynqMP GQSPI controller" depends on SPI_MASTER depends on SPI_MASTER && HAS_DMA help Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. Loading drivers/spi/spi-img-spfi.c +2 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,7 @@ #define SPFI_CONTROL_SOFT_RESET BIT(11) #define SPFI_CONTROL_SEND_DMA BIT(10) #define SPFI_CONTROL_GET_DMA BIT(9) #define SPFI_CONTROL_SE BIT(8) #define SPFI_CONTROL_TMODE_SHIFT 5 #define SPFI_CONTROL_TMODE_MASK 0x7 #define SPFI_CONTROL_TMODE_SINGLE 0 Loading Loading @@ -491,6 +492,7 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi, else if (xfer->tx_nbits == SPI_NBITS_QUAD && xfer->rx_nbits == SPI_NBITS_QUAD) val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT; val |= SPFI_CONTROL_SE; spfi_writel(spfi, val, SPFI_CONTROL); } Loading drivers/spi/spi-imx.c +3 −2 Original line number Diff line number Diff line Loading @@ -201,8 +201,9 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, { struct spi_imx_data *spi_imx = spi_master_get_devdata(master); if (spi_imx->dma_is_inited && (transfer->len > spi_imx->rx_wml) && (transfer->len > spi_imx->tx_wml)) if (spi_imx->dma_is_inited && transfer->len > spi_imx->rx_wml * sizeof(u32) && transfer->len > spi_imx->tx_wml * sizeof(u32)) return true; return false; } Loading drivers/spi/spi-zynqmp-gqspi.c +1 −0 Original line number Diff line number Diff line Loading @@ -214,6 +214,7 @@ static void zynqmp_gqspi_selectslave(struct zynqmp_qspi *instanceptr, case GQSPI_SELECT_FLASH_CS_BOTH: instanceptr->genfifocs = GQSPI_GENFIFO_CS_LOWER | GQSPI_GENFIFO_CS_UPPER; break; case GQSPI_SELECT_FLASH_CS_UPPER: instanceptr->genfifocs = GQSPI_GENFIFO_CS_UPPER; break; Loading drivers/spi/spidev.c +1 −0 Original line number Diff line number Diff line Loading @@ -693,6 +693,7 @@ static struct class *spidev_class; #ifdef CONFIG_OF static const struct of_device_id spidev_dt_ids[] = { { .compatible = "rohm,dh2228fv" }, { .compatible = "lineartechnology,ltc2488" }, {}, }; MODULE_DEVICE_TABLE(of, spidev_dt_ids); Loading Loading
drivers/spi/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -612,7 +612,7 @@ config SPI_XTENSA_XTFPGA config SPI_ZYNQMP_GQSPI tristate "Xilinx ZynqMP GQSPI controller" depends on SPI_MASTER depends on SPI_MASTER && HAS_DMA help Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. Loading
drivers/spi/spi-img-spfi.c +2 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,7 @@ #define SPFI_CONTROL_SOFT_RESET BIT(11) #define SPFI_CONTROL_SEND_DMA BIT(10) #define SPFI_CONTROL_GET_DMA BIT(9) #define SPFI_CONTROL_SE BIT(8) #define SPFI_CONTROL_TMODE_SHIFT 5 #define SPFI_CONTROL_TMODE_MASK 0x7 #define SPFI_CONTROL_TMODE_SINGLE 0 Loading Loading @@ -491,6 +492,7 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi, else if (xfer->tx_nbits == SPI_NBITS_QUAD && xfer->rx_nbits == SPI_NBITS_QUAD) val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT; val |= SPFI_CONTROL_SE; spfi_writel(spfi, val, SPFI_CONTROL); } Loading
drivers/spi/spi-imx.c +3 −2 Original line number Diff line number Diff line Loading @@ -201,8 +201,9 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, { struct spi_imx_data *spi_imx = spi_master_get_devdata(master); if (spi_imx->dma_is_inited && (transfer->len > spi_imx->rx_wml) && (transfer->len > spi_imx->tx_wml)) if (spi_imx->dma_is_inited && transfer->len > spi_imx->rx_wml * sizeof(u32) && transfer->len > spi_imx->tx_wml * sizeof(u32)) return true; return false; } Loading
drivers/spi/spi-zynqmp-gqspi.c +1 −0 Original line number Diff line number Diff line Loading @@ -214,6 +214,7 @@ static void zynqmp_gqspi_selectslave(struct zynqmp_qspi *instanceptr, case GQSPI_SELECT_FLASH_CS_BOTH: instanceptr->genfifocs = GQSPI_GENFIFO_CS_LOWER | GQSPI_GENFIFO_CS_UPPER; break; case GQSPI_SELECT_FLASH_CS_UPPER: instanceptr->genfifocs = GQSPI_GENFIFO_CS_UPPER; break; Loading
drivers/spi/spidev.c +1 −0 Original line number Diff line number Diff line Loading @@ -693,6 +693,7 @@ static struct class *spidev_class; #ifdef CONFIG_OF static const struct of_device_id spidev_dt_ids[] = { { .compatible = "rohm,dh2228fv" }, { .compatible = "lineartechnology,ltc2488" }, {}, }; MODULE_DEVICE_TABLE(of, spidev_dt_ids); Loading