Merge "usb: phy: Drive a pulse on DP on CDP detection" (0c245404) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/usb/phy/phy-msm-qusb.c

+93 −0

Original line number	Diff line number	Diff line
		@@ -20,6 +20,17 @@
		#include <linux/usb/phy.h>
		#include <linux/reset.h>

		#define QUSB2PHY_PLL_PWR_CTL 0x18
		#define REF_BUF_EN BIT(0)
		#define REXT_EN BIT(1)
		#define PLL_BYPASSNL BIT(2)
		#define REXT_TRIM_0 BIT(4)

		#define QUSB2PHY_PLL_AUTOPGM_CTL1 0x1C
		#define PLL_RESET_N_CNT_5 0x5
		#define PLL_RESET_N BIT(4)
		#define PLL_AUTOPGM_EN BIT(7)

		#define QUSB2PHY_PLL_STATUS 0x38
		#define QUSB2PHY_PLL_LOCK BIT(5)

		@@ -48,6 +59,7 @@
		#define CORE_READY_STATUS BIT(0)

		#define QUSB2PHY_PORT_UTMI_CTRL1 0xC0
		#define SUSPEND_N BIT(5)
		#define TERM_SELECT BIT(4)
		#define XCVR_SELECT_FS BIT(2)
		#define OP_MODE_NON_DRIVE BIT(0)
		@@ -725,6 +737,86 @@ static int qusb_phy_notify_disconnect(struct usb_phy *phy,
		return 0;
		}

		static int qusb_phy_drive_dp_pulse(struct usb_phy *phy,
		unsigned int pulse_width)
		{
		struct qusb_phy *qphy = container_of(phy, struct qusb_phy, phy);
		int ret;

		dev_dbg(qphy->phy.dev, "connected to a CDP, drive DP up\n");
		ret = qusb_phy_enable_power(qphy, true);
		if (ret < 0) {
		dev_dbg(qphy->phy.dev,
		"dpdm regulator enable failed:%d\n", ret);
		return ret;
		}
		qusb_phy_gdsc(qphy, true);
		qusb_phy_enable_clocks(qphy, true);

		ret = reset_control_assert(qphy->phy_reset);
		if (ret)
		dev_err(qphy->phy.dev, "phyassert failed\n");
		usleep_range(100, 150);
		ret = reset_control_deassert(qphy->phy_reset);
		if (ret)
		dev_err(qphy->phy.dev, "deassert failed\n");

		/* Configure PHY to enable control on DP/DM lines */
		writel_relaxed(CLAMP_N_EN \| FREEZIO_N \| POWER_DOWN,
		qphy->base + QUSB2PHY_PORT_POWERDOWN);

		writel_relaxed(TERM_SELECT \| XCVR_SELECT_FS \| OP_MODE_NON_DRIVE \|
		SUSPEND_N, qphy->base + QUSB2PHY_PORT_UTMI_CTRL1);

		writel_relaxed(UTMI_ULPI_SEL \| UTMI_TEST_MUX_SEL,
		qphy->base + QUSB2PHY_PORT_UTMI_CTRL2);

		writel_relaxed(PLL_RESET_N_CNT_5,
		qphy->base + QUSB2PHY_PLL_AUTOPGM_CTL1);

		writel_relaxed(CLAMP_N_EN \| FREEZIO_N,
		qphy->base + QUSB2PHY_PORT_POWERDOWN);

		writel_relaxed(REF_BUF_EN \| REXT_EN \| PLL_BYPASSNL \| REXT_TRIM_0,
		qphy->base + QUSB2PHY_PLL_PWR_CTL);

		usleep_range(5, 10);

		writel_relaxed(0x15, qphy->base + QUSB2PHY_PLL_AUTOPGM_CTL1);
		writel_relaxed(PLL_RESET_N \| PLL_RESET_N_CNT_5,
		qphy->base + QUSB2PHY_PLL_AUTOPGM_CTL1);

		writel_relaxed(0x00, qphy->base + QUSB2PHY_PORT_QC1);
		writel_relaxed(0x00, qphy->base + QUSB2PHY_PORT_QC2);

		usleep_range(50, 60);
		/* Enable Rdp_en to pull DP up to 3V */
		writel_relaxed(RDP_UP_EN, qphy->base + QUSB2PHY_PORT_QC2);
		msleep(pulse_width);

		/* Put the PHY and DP back to normal state */
		writel_relaxed(CLAMP_N_EN \| FREEZIO_N \| POWER_DOWN,
		qphy->base + QUSB2PHY_PORT_POWERDOWN); /* 23 */

		writel_relaxed(PLL_AUTOPGM_EN \| PLL_RESET_N \| PLL_RESET_N_CNT_5,
		qphy->base + QUSB2PHY_PLL_AUTOPGM_CTL1);

		writel_relaxed(UTMI_ULPI_SEL, qphy->base + QUSB2PHY_PORT_UTMI_CTRL2);

		writel_relaxed(TERM_SELECT, qphy->base + QUSB2PHY_PORT_UTMI_CTRL1);

		qusb_phy_enable_clocks(qphy, false);
		qusb_phy_gdsc(qphy, false);

		ret = qusb_phy_enable_power(qphy, false);
		if (ret < 0) {
		dev_dbg(qphy->phy.dev,
		"dpdm regulator disable failed:%d\n", ret);
		return ret;
		}
		return 0;
		}

		static int qusb_phy_dpdm_regulator_enable(struct regulator_dev *rdev)
		{
		int ret = 0;
		@@ -1129,6 +1221,7 @@ static int qusb_phy_probe(struct platform_device *pdev)
		qphy->phy.type = USB_PHY_TYPE_USB2;
		qphy->phy.notify_connect = qusb_phy_notify_connect;
		qphy->phy.notify_disconnect = qusb_phy_notify_disconnect;
		qphy->phy.drive_dp_pulse = qusb_phy_drive_dp_pulse;

		/*
		* On some platforms multiple QUSB PHYs are available. If QUSB PHY is