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Commit 0c1fc3c3 authored by Bharat Bhushan's avatar Bharat Bhushan Committed by Alexander Graf
Browse files

KVM: PPC: Critical interrupt emulation support 



rfci instruction and CSRR0/1 registers are emulated.

Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarStuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: default avatarBharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 66c9897d

arch/powerpc/kvm/booke_emulate.c

+25 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include "booke.h"



#define OP_19_XOP_RFI     50

#define OP_19_XOP_RFCI    51



#define OP_31_XOP_MFMSR   83

#define OP_31_XOP_WRTEE   131
@@ -36,6 +37,12 @@ static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu) 
	kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);

}



static void kvmppc_emul_rfci(struct kvm_vcpu *vcpu)

{

	vcpu->arch.pc = vcpu->arch.csrr0;

	kvmppc_set_msr(vcpu, vcpu->arch.csrr1);

}



int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,

                            unsigned int inst, int *advance)

{
@@ -52,6 +59,12 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, 
			*advance = 0;

			break;



		case OP_19_XOP_RFCI:

			kvmppc_emul_rfci(vcpu);

			kvmppc_set_exit_type(vcpu, EMULATED_RFCI_EXITS);

			*advance = 0;

			break;



		default:

			emulated = EMULATE_FAIL;

			break;
@@ -113,6 +126,12 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) 
	case SPRN_ESR:

		vcpu->arch.shared->esr = spr_val;

		break;

	case SPRN_CSRR0:

		vcpu->arch.csrr0 = spr_val;

		break;

	case SPRN_CSRR1:

		vcpu->arch.csrr1 = spr_val;

		break;

	case SPRN_DBCR0:

		vcpu->arch.dbcr0 = spr_val;

		break;
@@ -232,6 +251,12 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) 
	case SPRN_ESR:

		*spr_val = vcpu->arch.shared->esr;

		break;

	case SPRN_CSRR0:

		*spr_val = vcpu->arch.csrr0;

		break;

	case SPRN_CSRR1:

		*spr_val = vcpu->arch.csrr1;

		break;

	case SPRN_DBCR0:

		*spr_val = vcpu->arch.dbcr0;

		break;