Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0af8a137 authored by Philipp Zabel's avatar Philipp Zabel
Browse files

reset: stm32: use the reset-simple driver



The reset-simple driver can be used without changes.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Acked-by: default avatarGabriel Fernandez <gabriel.fernandez@st.com>
parent adf20d7c
Loading
Loading
Loading
Loading
+3 −8
Original line number Diff line number Diff line
@@ -77,19 +77,14 @@ config RESET_PISTACHIO

config RESET_SIMPLE
	bool "Simple Reset Controller Driver" if COMPILE_TEST
	default ARCH_SOCFPGA || ARCH_STRATIX10 || ARCH_SUNXI
	default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI
	help
	  This enables a simple reset controller driver for reset lines that
	  that can be asserted and deasserted by toggling bits in a contiguous,
	  exclusive register space.

	  Currently this driver supports Altera SoCFPGAs and Allwinner SoCs.

config RESET_STM32
	bool "STM32 Reset Driver" if COMPILE_TEST
	default ARCH_STM32
	help
	  This enables the RCC reset controller driver for STM32 MCUs.
	  Currently this driver supports Altera SoCFPGAs, the RCC reset
	  controller in STM32 MCUs, and Allwinner SoCs.

config RESET_SUNXI
	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
+0 −1
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ obj-$(CONFIG_RESET_MESON) += reset-meson.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
obj-$(CONFIG_RESET_STM32) += reset-stm32.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
+1 −0
Original line number Diff line number Diff line
@@ -120,6 +120,7 @@ static const struct reset_simple_devdata reset_simple_active_low = {

static const struct of_device_id reset_simple_dt_ids[] = {
	{ .compatible = "altr,rst-mgr", .data = &reset_simple_socfpga },
	{ .compatible = "st,stm32-rcc", },
	{ .compatible = "allwinner,sun6i-a31-clock-reset",
		.data = &reset_simple_active_low },
	{ /* sentinel */ },

drivers/reset/reset-stm32.c

deleted100644 → 0
+0 −108
Original line number Diff line number Diff line
/*
 * Copyright (C) Maxime Coquelin 2015
 * Author:  Maxime Coquelin <mcoquelin.stm32@gmail.com>
 * License terms:  GNU General Public License (GPL), version 2
 *
 * Heavily based on sunxi driver from Maxime Ripard.
 */

#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/types.h>

struct stm32_reset_data {
	spinlock_t			lock;
	void __iomem			*membase;
	struct reset_controller_dev	rcdev;
};

static int stm32_reset_assert(struct reset_controller_dev *rcdev,
			      unsigned long id)
{
	struct stm32_reset_data *data = container_of(rcdev,
						     struct stm32_reset_data,
						     rcdev);
	int bank = id / BITS_PER_LONG;
	int offset = id % BITS_PER_LONG;
	unsigned long flags;
	u32 reg;

	spin_lock_irqsave(&data->lock, flags);

	reg = readl(data->membase + (bank * 4));
	writel(reg | BIT(offset), data->membase + (bank * 4));

	spin_unlock_irqrestore(&data->lock, flags);

	return 0;
}

static int stm32_reset_deassert(struct reset_controller_dev *rcdev,
				unsigned long id)
{
	struct stm32_reset_data *data = container_of(rcdev,
						     struct stm32_reset_data,
						     rcdev);
	int bank = id / BITS_PER_LONG;
	int offset = id % BITS_PER_LONG;
	unsigned long flags;
	u32 reg;

	spin_lock_irqsave(&data->lock, flags);

	reg = readl(data->membase + (bank * 4));
	writel(reg & ~BIT(offset), data->membase + (bank * 4));

	spin_unlock_irqrestore(&data->lock, flags);

	return 0;
}

static const struct reset_control_ops stm32_reset_ops = {
	.assert		= stm32_reset_assert,
	.deassert	= stm32_reset_deassert,
};

static const struct of_device_id stm32_reset_dt_ids[] = {
	 { .compatible = "st,stm32-rcc", },
	 { /* sentinel */ },
};

static int stm32_reset_probe(struct platform_device *pdev)
{
	struct stm32_reset_data *data;
	struct resource *res;

	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	data->membase = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(data->membase))
		return PTR_ERR(data->membase);

	spin_lock_init(&data->lock);

	data->rcdev.owner = THIS_MODULE;
	data->rcdev.nr_resets = resource_size(res) * 8;
	data->rcdev.ops = &stm32_reset_ops;
	data->rcdev.of_node = pdev->dev.of_node;

	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
}

static struct platform_driver stm32_reset_driver = {
	.probe	= stm32_reset_probe,
	.driver = {
		.name		= "stm32-rcc-reset",
		.of_match_table	= stm32_reset_dt_ids,
	},
};
builtin_platform_driver(stm32_reset_driver);