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Commit 0aa9abd4 authored by Sébastien Szymanski's avatar Sébastien Szymanski Committed by Rafael J. Wysocki
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cpufreq: imx6q: check speed grades for i.MX6ULL



Check the max speed supported from the fuses for i.MX6ULL and update the
operating points table accordingly.

Signed-off-by: default avatarSébastien Szymanski <sebastien.szymanski@armadeus.com>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Tested-by: default avatarStefan Agner <stefan@agner.ch>
Reviewed-by: default avatarStefan Agner <stefan@agner.ch>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Acked-by: default avatarShawn Guo <shawnguo@kernel.org>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 75920196
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+23 −6
Original line number Diff line number Diff line
@@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device *dev)
}

#define OCOTP_CFG3_6UL_SPEED_696MHZ	0x2
#define OCOTP_CFG3_6ULL_SPEED_792MHZ	0x2
#define OCOTP_CFG3_6ULL_SPEED_900MHZ	0x3

static void imx6ul_opp_check_speed_grading(struct device *dev)
{
@@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device *dev)
	 * Speed GRADING[1:0] defines the max speed of ARM:
	 * 2b'00: Reserved;
	 * 2b'01: 528000000Hz;
	 * 2b'10: 696000000Hz;
	 * 2b'11: Reserved;
	 * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
	 * 2b'11: 900000000Hz on i.MX6ULL only;
	 * We need to set the max speed of ARM according to fuse map.
	 */
	val = readl_relaxed(base + OCOTP_CFG3);
	val >>= OCOTP_CFG3_SPEED_SHIFT;
	val &= 0x3;

	if (of_machine_is_compatible("fsl,imx6ul")) {
		if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
			if (dev_pm_opp_disable(dev, 696000000))
				dev_warn(dev, "failed to disable 696MHz OPP\n");
	}

	if (of_machine_is_compatible("fsl,imx6ull")) {
		if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
			if (dev_pm_opp_disable(dev, 792000000))
				dev_warn(dev, "failed to disable 792MHz OPP\n");

		if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
			if (dev_pm_opp_disable(dev, 900000000))
				dev_warn(dev, "failed to disable 900MHz OPP\n");
	}

	iounmap(base);
put_node:
	of_node_put(np);
@@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
		goto put_reg;
	}

	if (of_machine_is_compatible("fsl,imx6ul"))
	if (of_machine_is_compatible("fsl,imx6ul") ||
	    of_machine_is_compatible("fsl,imx6ull"))
		imx6ul_opp_check_speed_grading(cpu_dev);
	else
		imx6q_opp_check_speed_grading(cpu_dev);