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Commit 0a23ea65 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc 

Pull sparc fixes from David Miller:

 - block interrupts properly across the entire MMU context change (both
   the hw MMU context change and the TSB table change) so that we don't
   get a perf event interrupt in the middle. From Rob Gardner.

 - be sure to register hugepages early enough, from Nitin Gupta.

 - UltraSPARC-III user copy exception handling would return garbage for
   the copied length in some circumstances.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc64: Fix exception handling in UltraSPARC-III memcpy.
  sbus: Convert to using %pOF instead of full_name
  sparc: defconfig: Cleanup from old Kconfig options
  sparc64: Register hugepages during arch init
  sparc64: Prevent perf from running during super critical sections
parents c63716ab 0ede1c40

arch/sparc/configs/sparc32_defconfig

+0 −4
Original line number Diff line number Diff line 
CONFIG_EXPERIMENTAL=y

CONFIG_SYSVIPC=y

CONFIG_POSIX_MQUEUE=y

CONFIG_LOG_BUF_SHIFT=14
@@ -23,7 +22,6 @@ CONFIG_IP_PNP_DHCP=y 
CONFIG_INET_AH=y

CONFIG_INET_ESP=y

CONFIG_INET_IPCOMP=y

# CONFIG_INET_LRO is not set

CONFIG_INET6_AH=m

CONFIG_INET6_ESP=m

CONFIG_INET6_IPCOMP=m
@@ -69,7 +67,6 @@ CONFIG_EXT2_FS=y 
CONFIG_EXT2_FS_XATTR=y

CONFIG_EXT2_FS_POSIX_ACL=y

CONFIG_EXT2_FS_SECURITY=y

CONFIG_AUTOFS_FS=m

CONFIG_AUTOFS4_FS=m

CONFIG_ISO9660_FS=m

CONFIG_PROC_KCORE=y
@@ -82,7 +79,6 @@ CONFIG_NLS=y 
CONFIG_DEBUG_KERNEL=y

CONFIG_DETECT_HUNG_TASK=y

# CONFIG_SCHED_DEBUG is not set

# CONFIG_RCU_CPU_STALL_DETECTOR is not set

CONFIG_KGDB=y

CONFIG_KGDB_TESTS=y

CONFIG_CRYPTO_NULL=m

arch/sparc/configs/sparc64_defconfig

+0 −4
Original line number Diff line number Diff line 
CONFIG_64BIT=y

CONFIG_EXPERIMENTAL=y

# CONFIG_LOCALVERSION_AUTO is not set

CONFIG_SYSVIPC=y

CONFIG_POSIX_MQUEUE=y
@@ -184,7 +183,6 @@ CONFIG_HID_TOPSEED=y 
CONFIG_HID_THRUSTMASTER=y

CONFIG_HID_ZEROPLUS=y

CONFIG_USB=y

# CONFIG_USB_DEVICE_CLASS is not set

CONFIG_USB_EHCI_HCD=m

# CONFIG_USB_EHCI_TT_NEWSCHED is not set

CONFIG_USB_OHCI_HCD=y
@@ -210,8 +208,6 @@ CONFIG_LOCKUP_DETECTOR=y 
CONFIG_DETECT_HUNG_TASK=y

# CONFIG_SCHED_DEBUG is not set

CONFIG_SCHEDSTATS=y

# CONFIG_RCU_CPU_STALL_DETECTOR is not set

CONFIG_SYSCTL_SYSCALL_CHECK=y

CONFIG_BLK_DEV_IO_TRACE=y

CONFIG_UPROBE_EVENTS=y

CONFIG_KEYS=y

arch/sparc/include/asm/mmu_context_64.h

+9 −5
Original line number Diff line number Diff line
@@ -27,9 +27,11 @@ void destroy_context(struct mm_struct *mm); 
void __tsb_context_switch(unsigned long pgd_pa,

			  struct tsb_config *tsb_base,

			  struct tsb_config *tsb_huge,

			  unsigned long tsb_descr_pa);

			  unsigned long tsb_descr_pa,

			  unsigned long secondary_ctx);



static inline void tsb_context_switch(struct mm_struct *mm)

static inline void tsb_context_switch_ctx(struct mm_struct *mm,

					  unsigned long ctx)

{

	__tsb_context_switch(__pa(mm->pgd),

			     &mm->context.tsb_block[MM_TSB_BASE],
@@ -40,9 +42,12 @@ static inline void tsb_context_switch(struct mm_struct *mm) 
#else

			     NULL

#endif

			     , __pa(&mm->context.tsb_descr[MM_TSB_BASE]));

			     , __pa(&mm->context.tsb_descr[MM_TSB_BASE]),

			     ctx);

}



#define tsb_context_switch(X) tsb_context_switch_ctx(X, 0)



void tsb_grow(struct mm_struct *mm,

	      unsigned long tsb_index,

	      unsigned long mm_rss);
@@ -112,8 +117,7 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str 
	 * cpu0 to update it's TSB because at that point the cpu_vm_mask

	 * only had cpu1 set in it.

	 */

	load_secondary_context(mm);

	tsb_context_switch(mm);

	tsb_context_switch_ctx(mm, CTX_HWBITS(mm->context));



	/* Any time a processor runs a context on an address space

	 * for the first time, we must flush that context out of the

arch/sparc/kernel/tsb.S

+12 −0
Original line number Diff line number Diff line
@@ -360,6 +360,7 @@ tsb_flush: 
	 * %o1:	TSB base config pointer

	 * %o2:	TSB huge config pointer, or NULL if none

	 * %o3:	Hypervisor TSB descriptor physical address

	 * %o4: Secondary context to load, if non-zero

	 *

	 * We have to run this whole thing with interrupts

	 * disabled so that the current cpu doesn't change
@@ -372,6 +373,17 @@ __tsb_context_switch: 
	rdpr	%pstate, %g1

	wrpr	%g1, PSTATE_IE, %pstate



	brz,pn	%o4, 1f

	 mov	SECONDARY_CONTEXT, %o5



661:	stxa	%o4, [%o5] ASI_DMMU

	.section .sun4v_1insn_patch, "ax"

	.word	661b

	stxa	%o4, [%o5] ASI_MMU

	.previous

	flush	%g6



1:

	TRAP_LOAD_TRAP_BLOCK(%g2, %g3)



	stx	%o0, [%g2 + TRAP_PER_CPU_PGD_PADDR]

arch/sparc/lib/U3memcpy.S

+2 −2
Original line number Diff line number Diff line
@@ -145,13 +145,13 @@ ENDPROC(U3_retl_o2_plus_GS_plus_0x08) 
ENTRY(U3_retl_o2_and_7_plus_GS)

	and	%o2, 7, %o2

	retl

	 add	%o2, GLOBAL_SPARE, %o2

	 add	%o2, GLOBAL_SPARE, %o0

ENDPROC(U3_retl_o2_and_7_plus_GS)

ENTRY(U3_retl_o2_and_7_plus_GS_plus_8)

	add	GLOBAL_SPARE, 8, GLOBAL_SPARE

	and	%o2, 7, %o2

	retl

	 add	%o2, GLOBAL_SPARE, %o2

	 add	%o2, GLOBAL_SPARE, %o0

ENDPROC(U3_retl_o2_and_7_plus_GS_plus_8)

#endif