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Commit 09ebf366 authored by Philipp Zabel's avatar Philipp Zabel Committed by Shawn Guo
Browse files

ARM i.MX6q: Link system reset controller (SRC) to IPU in DT 



Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: default avatarStephen Warren <swarren@nvidia.com>
Reviewed-by: default avatarMarek Vasut <marex@denx.de>
Reviewed-by: default avatarPavel Machek <pavel@ucw.cz>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 41c04342

arch/arm/boot/dts/imx6q.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -335,6 +335,7 @@ 
			interrupts = <0 8 0x4 0 7 0x4>;

			clocks = <&clks 133>, <&clks 134>, <&clks 137>;

			clock-names = "bus", "di0", "di1";

			resets = <&src 4>;

		};

	};

};

arch/arm/boot/dts/imx6qdl.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -523,6 +523,7 @@ 
				compatible = "fsl,imx6q-src";

				reg = <0x020d8000 0x4000>;

				interrupts = <0 91 0x04 0 96 0x04>;

				#reset-cells = <1>;

			};



			gpc: gpc@020dc000 {
@@ -822,6 +823,7 @@ 
			interrupts = <0 6 0x4 0 5 0x4>;

			clocks = <&clks 130>, <&clks 131>, <&clks 132>;

			clock-names = "bus", "di0", "di1";

			resets = <&src 2>;

		};

	};

};