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Commit 09e914d6 authored by Guneshwor Singh's avatar Guneshwor Singh Committed by Mark Brown
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ASoC: Intel: Skylake: Add sram address to sst_addr structure 



SRAM address and memory window size differ for different platforms.
So add members to sst_addr structure and initialize them in the
respective dsp_init().

Signed-off-by: default avatarGuneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent d14700a0

sound/soc/intel/common/sst-dsp-priv.h

+4 −0
Original line number Original line Diff line number Diff line
@@ -77,6 +77,10 @@ struct sst_addr { 
	u32 dram_offset;

	u32 dram_offset;

	u32 dsp_iram_offset;

	u32 dsp_iram_offset;

	u32 dsp_dram_offset;

	u32 dsp_dram_offset;

	u32 sram0_base;

	u32 sram1_base;

	u32 w0_stat_sz;

	u32 w0_up_sz;

	void __iomem *lpe;

	void __iomem *lpe;

	void __iomem *shim;

	void __iomem *shim;

	void __iomem *pci_cfg;

	void __iomem *pci_cfg;

sound/soc/intel/skylake/bxt-sst.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -573,6 +573,10 @@ int bxt_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, 
	sst->fw_ops = bxt_fw_ops;

	sst->fw_ops = bxt_fw_ops;

	sst->addr.lpe = mmio_base;

	sst->addr.lpe = mmio_base;

	sst->addr.shim = mmio_base;

	sst->addr.shim = mmio_base;

	sst->addr.sram0_base = BXT_ADSP_SRAM0_BASE;

	sst->addr.sram1_base = BXT_ADSP_SRAM1_BASE;

	sst->addr.w0_stat_sz = SKL_ADSP_W0_STAT_SZ;

	sst->addr.w0_up_sz = SKL_ADSP_W0_UP_SZ;





	sst_dsp_mailbox_init(sst, (BXT_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),

	sst_dsp_mailbox_init(sst, (BXT_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),

			SKL_ADSP_W0_UP_SZ, BXT_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);

			SKL_ADSP_W0_UP_SZ, BXT_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);

sound/soc/intel/skylake/skl-sst.c

+5 −0
Original line number Original line Diff line number Diff line
@@ -553,6 +553,11 @@ int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, 
	sst = skl->dsp;

	sst = skl->dsp;

	sst->addr.lpe = mmio_base;

	sst->addr.lpe = mmio_base;

	sst->addr.shim = mmio_base;

	sst->addr.shim = mmio_base;

	sst->addr.sram0_base = SKL_ADSP_SRAM0_BASE;

	sst->addr.sram1_base = SKL_ADSP_SRAM1_BASE;

	sst->addr.w0_stat_sz = SKL_ADSP_W0_STAT_SZ;

	sst->addr.w0_up_sz = SKL_ADSP_W0_UP_SZ;



	sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),

	sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),

			SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);

			SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);