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Commit 09893ee8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull "ARM: More device tree support updates" from Olof Johansson:
 "This branch contains a number of updates for device tree support on
  several ARM platforms, in particular:

   * AT91 continues the device tree conversion adding support for a
     number of on-chip drivers and other functionality
   * ux500 adds probing of some of the core SoC blocks through device
     tree
   * Initial device tree support for ST SPEAr600 platforms
   * kirkwood continues the conversion to device-tree probing"

Manually merge arch/arm/mach-ux500/Kconfig due to MACH_U8500 rename, and
drivers/usb/gadget/at91_udc.c due to header file include cleanups.

Also do an "evil merge" for the MACH_U8500 config option rename that the
affected RMI4 touchscreen driver in staging.  It's called MACH_MOP500
now, and it was missed during previous merges.

* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  ARM: SPEAr600: Add device-tree support to SPEAr600 boards
  ARM: ux500: Provide local timer support for Device Tree
  ARM: ux500: Enable PL022 SSP Controller in Device Tree
  ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree
  ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree
  ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree
  ARM: ux500: db8500: list most devices in the snowball device tree
  ARM: ux500: split dts file for snowball into generic part
  ARM: ux500: combine the board init functions for DT boot
  ARM: ux500: Initial Device Tree support for Snowball
  ARM: ux500: CONFIG: Enable Device Tree support for future endeavours
  ARM: kirkwood: use devicetree for rtc-mv
  ARM: kirkwood: rtc-mv devicetree bindings
  ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0
  ARM: kirkwood: fdt: facilitate new boards during fdt migration
  ARM: kirkwood: fdt: absorb kirkwood_init()
  ARM: kirkwood: fdt: use mrvl ticker symbol
  ARM: orion: wdt: use resource vice direct access
  ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data.
  ARM: orion: spi: remove enable_clock_fix which is not used
  ...
parents 4bb2d100 7d1206bc
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@@ -30,3 +30,63 @@ One interrupt per TC channel in a TC block:
		reg = <0xfffdc000 0x100>;
		interrupts = <26 4 27 4 28 4>;
	};

RSTC Reset Controller required properties:
- compatible: Should be "atmel,<chip>-rstc".
  <chip> can be "at91sam9260" or "at91sam9g45"
- reg: Should contain registers location and length

Example:

	rstc@fffffd00 {
		compatible = "atmel,at91sam9260-rstc";
		reg = <0xfffffd00 0x10>;
	};

RAMC SDRAM/DDR Controller required properties:
- compatible: Should be "atmel,at91sam9260-sdramc",
			"atmel,at91sam9g45-ddramc",
- reg: Should contain registers location and length
  For at91sam9263 and at91sam9g45 you must specify 2 entries.

Examples:

	ramc0: ramc@ffffe800 {
		compatible = "atmel,at91sam9g45-ddramc";
		reg = <0xffffe800 0x200>;
	};

	ramc0: ramc@ffffe400 {
		compatible = "atmel,at91sam9g45-ddramc";
		reg = <0xffffe400 0x200
		       0xffffe600 0x200>;
	};

SHDWC Shutdown Controller

required properties:
- compatible: Should be "atmel,<chip>-shdwc".
  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
- reg: Should contain registers location and length

optional properties:
- atmel,wakeup-mode: String, operation mode of the wakeup mode.
  Supported values are: "none", "high", "low", "any".
- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).

optional at91sam9260 properties:
- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.

optional at91sam9rl properties:
- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.

optional at91sam9x5 properties:
- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.

Example:

	rstc@fffffd00 {
		compatible = "atmel,at91sam9260-rstc";
		reg = <0xfffffd00 0x10>;
	};
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* Power Management Controller (PMC)

Required properties:
- compatible: Should be "atmel,at91rm9200-pmc"
- reg: Should contain PMC registers location and length

Examples:
	pmc: pmc@fffffc00 {
		compatible = "atmel,at91rm9200-pmc";
		reg = <0xfffffc00 0x100>;
	};
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ST SPEAr Platforms Device Tree Bindings
---------------------------------------

Boards with the ST SPEAr600 SoC shall have the following properties:

Required root node property:

compatible = "st,spear600";
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Device-Tree bindings for i2c gpio driver

Required properties:
	- compatible = "i2c-gpio";
	- gpios: sda and scl gpio


Optional properties:
	- i2c-gpio,sda-open-drain: sda as open drain
	- i2c-gpio,scl-open-drain: scl as open drain
	- i2c-gpio,scl-output-only: scl as output only
	- i2c-gpio,delay-us: delay between GPIO operations (may depend on each platform)
	- i2c-gpio,timeout-ms: timeout to get data

Example nodes:

i2c@0 {
	compatible = "i2c-gpio";
	gpios = <&pioA 23 0 /* sda */
		 &pioA 24 0 /* scl */
		>;
	i2c-gpio,sda-open-drain;
	i2c-gpio,scl-open-drain;
	i2c-gpio,delay-us = <2>;	/* ~100 kHz */
	#address-cells = <1>;
	#size-cells = <0>;

	rv3029c2@56 {
		compatible = "rv3029c2";
		reg = <0x56>;
	};
};
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Atmel NAND flash

Required properties:
- compatible : "atmel,at91rm9200-nand".
- reg : should specify localbus address and size used for the chip,
	and if availlable the ECC.
- atmel,nand-addr-offset : offset for the address latch.
- atmel,nand-cmd-offset : offset for the command latch.
- #address-cells, #size-cells : Must be present if the device has sub-nodes
  representing partitions.

- gpios : specifies the gpio pins to control the NAND device. detect is an
  optional gpio and may be set to 0 if not present.

Optional properties:
- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
  "soft_bch".
- nand-bus-width : 8 or 16 bus width if not present 8
- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false

Examples:
nand0: nand@40000000,0 {
	compatible = "atmel,at91rm9200-nand";
	#address-cells = <1>;
	#size-cells = <1>;
	reg = <0x40000000 0x10000000
	       0xffffe800 0x200
	      >;
	atmel,nand-addr-offset = <21>;
	atmel,nand-cmd-offset = <22>;
	nand-on-flash-bbt;
	nand-ecc-mode = "soft";
	gpios = <&pioC 13 0
		 &pioC 14 0
		 0
		>;
	partition@0 {
		...
	};
};
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