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Commit 0966a416 authored by Ivan Khoronzhuk's avatar Ivan Khoronzhuk Committed by Brian Norris
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mtd: nand: davinci: don't request AEMIF address range 



The TI AEMIF driver registers are used to setup timings for each chip
select. The same registers range is used to setup NAND settings.
The AEMIF and NAND drivers not use the same registers in this range.

In case with TI AEMIF driver, the memory address range is requested
already by AEMIF, so we cannot request it twice, just ioremap.

Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: default avatarTaras Kondratiuk <taras@ti.com>
Signed-off-by: default avatarIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 458f3933

drivers/mtd/nand/davinci_nand.c

+11 −3
Original line number Diff line number Diff line
@@ -637,9 +637,17 @@ static int nand_davinci_probe(struct platform_device *pdev) 
	if (IS_ERR(vaddr))

		return PTR_ERR(vaddr);



	base = devm_ioremap_resource(&pdev->dev, res2);

	if (IS_ERR(base))

		return PTR_ERR(base);

	/*

	 * This registers range is used to setup NAND settings. In case with

	 * TI AEMIF driver, the same memory address range is requested already

	 * by AEMIF, so we cannot request it twice, just ioremap.

	 * The AEMIF and NAND drivers not use the same registers in this range.

	 */

	base = devm_ioremap(&pdev->dev, res2->start, resource_size(res2));

	if (!base) {

		dev_err(&pdev->dev, "ioremap failed for resource %pR\n", res2);

		return -EADDRNOTAVAIL;

	}



	info->dev		= &pdev->dev;

	info->base		= base;