Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 08c90a00 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "phy: qcom-ufs: make ref_clk as optional"

parents 487529bd 21152f15

Documentation/devicetree/bindings/ufs/ufs-qcom.txt

+2 −2
Original line number Diff line number Diff line
@@ -29,9 +29,9 @@ Required properties: 
- vdda-pll-supply   : phandle to PHY PLL and Power-Gen block power supply

- clocks	    : List of phandle and clock specifier pairs

- clock-names       : List of clock input name strings sorted in the same

		      order as the clocks property. "ref_clk_src", "ref_clk",

		      order as the clocks property. "ref_clk_src",

		      "tx_iface_clk" & "rx_iface_clk" are mandatory but

		      "ref_clk_parent" is optional

		      "ref_clk_parent" and "ref_clk" are optional



Optional properties:

- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply

drivers/phy/qualcomm/phy-qcom-ufs.c

+25 −10
Original line number Diff line number Diff line
@@ -221,10 +221,12 @@ int ufs_qcom_phy_init_clks(struct ufs_qcom_phy *phy_common) 
	__ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk_parent",

				   &phy_common->ref_clk_parent, false);



	err = ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk",

				   &phy_common->ref_clk);

	if (err)

		goto out;

	/*

	 * Some platforms may not have the ON/OFF control for reference clock,

	 * hence this clock may be optional.

	 */

	__ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk",

				   &phy_common->ref_clk, false);



	/*

	 * "ref_aux_clk" is optional and only supported by certain
@@ -414,12 +416,18 @@ static int ufs_qcom_phy_enable_ref_clk(struct ufs_qcom_phy *phy) 
		}

	}



	/*

	 * "ref_clk" is optional clock hence make sure that clk reference

	 * is available before trying to enable the clock.

	 */

	if (phy->ref_clk) {

		ret = clk_prepare_enable(phy->ref_clk);

		if (ret) {

			dev_err(phy->dev, "%s: ref_clk enable failed %d\n",

					__func__, ret);

			goto out_disable_parent;

		}

	}



	/*

	 * "ref_aux_clk" is optional clock and only supported by certain
@@ -482,7 +490,14 @@ static void ufs_qcom_phy_disable_ref_clk(struct ufs_qcom_phy *phy) 
		 */

		if (phy->ref_aux_clk)

			clk_disable_unprepare(phy->ref_aux_clk);



		/*

		 * "ref_clk" is optional clock hence make sure that clk

		 * reference is available before trying to disable the clock.

		 */

		if (phy->ref_clk)

			clk_disable_unprepare(phy->ref_clk);



		/*

		 * "ref_clk_parent" is optional clock hence make sure that clk

		 * reference is available before trying to disable the clock.