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Commit 080012ba authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'powerpc-4.13-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux 

Pull powerpc fixes from Michael Ellerman:
 "The highlight is Ben's patch to work around a host killing bug when
  running KVM guests with the Radix MMU on Power9. See the long change
  log of that commit for more detail.

  And then three fairly minor fixes:

   - fix of_node_put() underflow during reconfig remove, using old DLPAR
     tools.

   - fix recently introduced ld version check with 64-bit LE-only
     toolchain.

   - free the subpage_prot_table correctly, avoiding a memory leak.

  Thanks to: Aneesh Kumar K.V, Benjamin Herrenschmidt, Laurent Vivier"

* tag 'powerpc-4.13-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/mm/hash: Free the subpage_prot_table correctly
  powerpc/Makefile: Fix ld version check with 64-bit LE-only toolchain
  powerpc/pseries: Fix of_node_put() underflow during reconfig remove
  powerpc/mm/radix: Workaround prefetch issue with KVM
parents e26f1bea 0da12a7a

arch/powerpc/Makefile

+13 −12
Original line number Diff line number Diff line
@@ -59,6 +59,19 @@ machine-$(CONFIG_PPC64) += 64 
machine-$(CONFIG_CPU_LITTLE_ENDIAN) += le

UTS_MACHINE := $(subst $(space),,$(machine-y))



# XXX This needs to be before we override LD below

ifdef CONFIG_PPC32

KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o

else

ifeq ($(call ld-ifversion, -ge, 225000000, y),y)

# Have the linker provide sfpr if possible.

# There is a corresponding test in arch/powerpc/lib/Makefile

KBUILD_LDFLAGS_MODULE += --save-restore-funcs

else

KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o

endif

endif



ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)

override LD	+= -EL

LDEMULATION	:= lppc
@@ -190,18 +203,6 @@ else 
CHECKFLAGS	+= -D__LITTLE_ENDIAN__

endif



ifdef CONFIG_PPC32

KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o

else

ifeq ($(call ld-ifversion, -ge, 225000000, y),y)

# Have the linker provide sfpr if possible.

# There is a corresponding test in arch/powerpc/lib/Makefile

KBUILD_LDFLAGS_MODULE += --save-restore-funcs

else

KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o

endif

endif



ifeq ($(CONFIG_476FPE_ERR46),y)

	KBUILD_LDFLAGS_MODULE += --ppc476-workaround \

		-T $(srctree)/arch/powerpc/platforms/44x/ppc476_modules.lds

arch/powerpc/include/asm/book3s/64/mmu.h

+8 −7
Original line number Diff line number Diff line
@@ -59,13 +59,14 @@ extern struct patb_entry *partition_tb; 
#define PRTS_MASK	0x1f		/* process table size field */

#define PRTB_MASK	0x0ffffffffffff000UL



/*

 * Limit process table to PAGE_SIZE table. This

 * also limit the max pid we can support.

 * MAX_USER_CONTEXT * 16 bytes of space.

 */

#define PRTB_SIZE_SHIFT	(CONTEXT_BITS + 4)

#define PRTB_ENTRIES	(1ul << CONTEXT_BITS)

/* Number of supported PID bits */

extern unsigned int mmu_pid_bits;



/* Base PID to allocate from */

extern unsigned int mmu_base_pid;



#define PRTB_SIZE_SHIFT	(mmu_pid_bits + 4)

#define PRTB_ENTRIES	(1ul << mmu_pid_bits)



/*

 * Power9 currently only support 64K partition table size.

arch/powerpc/include/asm/mmu_context.h

+16 −2
Original line number Diff line number Diff line
@@ -67,6 +67,12 @@ extern void __destroy_context(unsigned long context_id); 
extern void mmu_context_init(void);

#endif



#if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)

extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);

#else

static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }

#endif



extern void switch_cop(struct mm_struct *next);

extern int use_cop(unsigned long acop, struct mm_struct *mm);

extern void drop_cop(unsigned long acop, struct mm_struct *mm);
@@ -79,9 +85,13 @@ static inline void switch_mm_irqs_off(struct mm_struct *prev, 
				      struct mm_struct *next,

				      struct task_struct *tsk)

{

	bool new_on_cpu = false;



	/* Mark this context has been used on the new CPU */

	if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next)))

	if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next))) {

		cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));

		new_on_cpu = true;

	}



	/* 32-bit keeps track of the current PGDIR in the thread struct */

#ifdef CONFIG_PPC32
@@ -109,6 +119,10 @@ static inline void switch_mm_irqs_off(struct mm_struct *prev, 
	if (cpu_has_feature(CPU_FTR_ALTIVEC))

		asm volatile ("dssall");

#endif /* CONFIG_ALTIVEC */



	if (new_on_cpu)

		radix_kvm_prefetch_workaround(next);



	/*

	 * The actual HW switching method differs between the various

	 * sub architectures. Out of line for now

arch/powerpc/kvm/book3s_hv_rmhandlers.S

+51 −8
Original line number Diff line number Diff line
@@ -1443,12 +1443,14 @@ mc_cont: 
	ori	r6,r6,1

	mtspr	SPRN_CTRLT,r6

4:

	/* Read the guest SLB and save it away */

	/* Check if we are running hash or radix and store it in cr2 */

	ld	r5, VCPU_KVM(r9)

	lbz	r0, KVM_RADIX(r5)

	cmpwi	r0, 0

	cmpwi	cr2,r0,0



	/* Read the guest SLB and save it away */

	li	r5, 0

	bne	3f			/* for radix, save 0 entries */

	bne	cr2, 3f			/* for radix, save 0 entries */

	lwz	r0,VCPU_SLB_NR(r9)	/* number of entries in SLB */

	mtctr	r0

	li	r6,0
@@ -1712,11 +1714,6 @@ BEGIN_FTR_SECTION_NESTED(96) 
END_FTR_SECTION_NESTED(CPU_FTR_ARCH_300, 0, 96)

END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)

22:

	/* Clear out SLB */

	li	r5,0

	slbmte	r5,r5

	slbia

	ptesync



	/* Restore host values of some registers */

BEGIN_FTR_SECTION
@@ -1737,10 +1734,56 @@ BEGIN_FTR_SECTION 
	mtspr	SPRN_PID, r7

	mtspr	SPRN_IAMR, r8

END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)



#ifdef CONFIG_PPC_RADIX_MMU

	/*

	 * Are we running hash or radix ?

	 */

	beq	cr2,3f



	/* Radix: Handle the case where the guest used an illegal PID */

	LOAD_REG_ADDR(r4, mmu_base_pid)

	lwz	r3, VCPU_GUEST_PID(r9)

	lwz	r5, 0(r4)

	cmpw	cr0,r3,r5

	blt	2f



	/*

	 * Illegal PID, the HW might have prefetched and cached in the TLB

	 * some translations for the  LPID 0 / guest PID combination which

	 * Linux doesn't know about, so we need to flush that PID out of

	 * the TLB. First we need to set LPIDR to 0 so tlbiel applies to

	 * the right context.

	*/

	li	r0,0

	mtspr	SPRN_LPID,r0

	isync



	/* Then do a congruence class local flush */

	ld	r6,VCPU_KVM(r9)

	lwz	r0,KVM_TLB_SETS(r6)

	mtctr	r0

	li	r7,0x400		/* IS field = 0b01 */

	ptesync

	sldi	r0,r3,32		/* RS has PID */

1:	PPC_TLBIEL(7,0,2,1,1)		/* RIC=2, PRS=1, R=1 */

	addi	r7,r7,0x1000

	bdnz	1b

	ptesync



2:	/* Flush the ERAT on radix P9 DD1 guest exit */

BEGIN_FTR_SECTION

	PPC_INVALIDATE_ERAT

END_FTR_SECTION_IFSET(CPU_FTR_POWER9_DD1)

	b	4f

#endif /* CONFIG_PPC_RADIX_MMU */



	/* Hash: clear out SLB */

3:	li	r5,0

	slbmte	r5,r5

	slbia

	ptesync

4:

	/*

	 * POWER7/POWER8 guest -> host partition switch code.

	 * We don't have to lock against tlbies but we do

arch/powerpc/mm/mmu_context_book3s64.c

+3 −2
Original line number Diff line number Diff line
@@ -126,9 +126,10 @@ static int hash__init_new_context(struct mm_struct *mm) 
static int radix__init_new_context(struct mm_struct *mm)

{

	unsigned long rts_field;

	int index;

	int index, max_id;



	index = alloc_context_id(1, PRTB_ENTRIES - 1);

	max_id = (1 << mmu_pid_bits) - 1;

	index = alloc_context_id(mmu_base_pid, max_id);

	if (index < 0)

		return index;