Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 06eb3a0f authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
Browse files

clk: qcom: sdm660: Add support for DT RPM controlled clocks 



Add the SMD-RPM clock which are required by clients to
be voted on sdm660.
This is snapshot of the SMD-RPM clock DT as of
msm-4.14 'commit 4d7da9f5ed3ac19c8 (" Merge "defconfig:
sa8195: Enable config for dyn splash"")'.

Change-Id: I8aed8036c168464707170bedd1fa5f26ea988b36
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 55303f9f

include/dt-bindings/clock/qcom,rpmcc.h

+86 −71
Original line number Diff line number Diff line
@@ -143,76 +143,91 @@ 
#define RPM_SMD_RF_CLK3_A_PIN			91

#define RPM_SMD_LN_BB_CLK1			92

#define RPM_SMD_LN_BB_CLK1_A			93

#define RPM_SMD_LN_BB_CLK2			94

#define RPM_SMD_LN_BB_CLK2_A			95

#define RPM_SMD_LN_BB_CLK3			96

#define RPM_SMD_LN_BB_CLK3_A			97

#define RPM_SMD_MMAXI_CLK			98

#define RPM_SMD_MMAXI_A_CLK			99

#define RPM_SMD_AGGR1_NOC_CLK			100

#define RPM_SMD_AGGR1_NOC_A_CLK			101

#define RPM_SMD_AGGR2_NOC_CLK			102

#define RPM_SMD_AGGR2_NOC_A_CLK			103

#define PNOC_MSMBUS_CLK				104

#define PNOC_MSMBUS_A_CLK			105

#define PNOC_KEEPALIVE_A_CLK			106

#define SNOC_MSMBUS_CLK				107

#define SNOC_MSMBUS_A_CLK			108

#define BIMC_MSMBUS_CLK				109

#define BIMC_MSMBUS_A_CLK			110

#define PNOC_USB_CLK				111

#define PNOC_USB_A_CLK				112

#define SNOC_USB_CLK				113

#define SNOC_USB_A_CLK				114

#define BIMC_USB_CLK				115

#define BIMC_USB_A_CLK				116

#define SNOC_WCNSS_A_CLK			117

#define BIMC_WCNSS_A_CLK			118

#define MCD_CE1_CLK				119

#define QCEDEV_CE1_CLK				120

#define QCRYPTO_CE1_CLK				121

#define QSEECOM_CE1_CLK				122

#define SCM_CE1_CLK				123

#define CXO_SMD_OTG_CLK				124

#define CXO_SMD_LPM_CLK				125

#define CXO_SMD_PIL_PRONTO_CLK			126

#define CXO_SMD_PIL_MSS_CLK			127

#define CXO_SMD_WLAN_CLK			128

#define CXO_SMD_PIL_LPASS_CLK			129

#define CXO_SMD_PIL_CDSP_CLK			130

#define CNOC_MSMBUS_CLK				131

#define CNOC_MSMBUS_A_CLK			132

#define CNOC_KEEPALIVE_A_CLK			133

#define SNOC_KEEPALIVE_A_CLK			134

#define CPP_MMNRT_MSMBUS_CLK			135

#define CPP_MMNRT_MSMBUS_A_CLK			136

#define JPEG_MMNRT_MSMBUS_CLK			137

#define JPEG_MMNRT_MSMBUS_A_CLK			138

#define VENUS_MMNRT_MSMBUS_CLK			139

#define VENUS_MMNRT_MSMBUS_A_CLK		140

#define ARM9_MMNRT_MSMBUS_CLK			141

#define ARM9_MMNRT_MSMBUS_A_CLK			142

#define MDP_MMRT_MSMBUS_CLK			143

#define MDP_MMRT_MSMBUS_A_CLK			144

#define VFE_MMRT_MSMBUS_CLK			145

#define VFE_MMRT_MSMBUS_A_CLK			146

#define QUP0_MSMBUS_SNOC_PERIPH_CLK		147

#define QUP0_MSMBUS_SNOC_PERIPH_A_CLK		148

#define QUP1_MSMBUS_SNOC_PERIPH_CLK		149

#define QUP1_MSMBUS_SNOC_PERIPH_A_CLK		150

#define QUP2_MSMBUS_SNOC_PERIPH_CLK             151

#define QUP2_MSMBUS_SNOC_PERIPH_A_CLK           152

#define DAP_MSMBUS_SNOC_PERIPH_CLK		153

#define DAP_MSMBUS_SNOC_PERIPH_A_CLK		154

#define SDC1_MSMBUS_SNOC_PERIPH_CLK		155

#define SDC1_MSMBUS_SNOC_PERIPH_A_CLK		156

#define SDC2_MSMBUS_SNOC_PERIPH_CLK		157

#define SDC2_MSMBUS_SNOC_PERIPH_A_CLK		158

#define CRYPTO_MSMBUS_SNOC_PERIPH_CLK		159

#define CRYPTO_MSMBUS_SNOC_PERIPH_A_CLK		160

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_CLK		161

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_A_CLK	162

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_CLK		163

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_A_CLK	164

#define RPM_SMD_LN_BB_CLK1_PIN			94

#define RPM_SMD_LN_BB_CLK1_A_PIN		95

#define RPM_SMD_LN_BB_CLK2			96

#define RPM_SMD_LN_BB_CLK2_A			97

#define RPM_SMD_LN_BB_CLK2_PIN			98

#define RPM_SMD_LN_BB_CLK2_A_PIN		99

#define RPM_SMD_LN_BB_CLK3			100

#define RPM_SMD_LN_BB_CLK3_A		     101

#define RPM_SMD_LN_BB_CLK3_PIN		     102

#define RPM_SMD_LN_BB_CLK3_A_PIN	     103

#define RPM_SMD_MMAXI_CLK			     104

#define RPM_SMD_MMAXI_A_CLK			     105

#define RPM_SMD_AGGR1_NOC_CLK		     106

#define RPM_SMD_AGGR1_NOC_A_CLK		     107

#define RPM_SMD_AGGR2_NOC_CLK		     108

#define RPM_SMD_AGGR2_NOC_A_CLK		     109

#define RPM_SMD_CNOC_PERIPH_CLK		     110

#define RPM_SMD_CNOC_PERIPH_A_CLK	     111

#define RPM_SMD_MMSSNOC_AXI_CLK		     112

#define RPM_SMD_MMSSNOC_AXI_A_CLK	     113

#define PNOC_MSMBUS_CLK				     114

#define PNOC_MSMBUS_A_CLK			     115

#define PNOC_KEEPALIVE_A_CLK		     116

#define SNOC_MSMBUS_CLK				     117

#define SNOC_MSMBUS_A_CLK			     118

#define BIMC_MSMBUS_CLK				     119

#define BIMC_MSMBUS_A_CLK			     120

#define PNOC_USB_CLK				     121

#define PNOC_USB_A_CLK				     122

#define SNOC_USB_CLK				     123

#define SNOC_USB_A_CLK				     124

#define BIMC_USB_CLK				     125

#define BIMC_USB_A_CLK				     126

#define SNOC_WCNSS_A_CLK			     127

#define BIMC_WCNSS_A_CLK			     128

#define MCD_CE1_CLK				         129

#define QCEDEV_CE1_CLK				     130

#define QCRYPTO_CE1_CLK				     131

#define QSEECOM_CE1_CLK				     132

#define SCM_CE1_CLK				         133

#define CXO_SMD_OTG_CLK				     134

#define CXO_SMD_LPM_CLK				     135

#define CXO_SMD_PIL_PRONTO_CLK		     136

#define CXO_SMD_PIL_MSS_CLK			     137

#define CXO_SMD_WLAN_CLK			     138

#define CXO_SMD_PIL_LPASS_CLK		     139

#define CXO_SMD_PIL_CDSP_CLK		     140

#define CXO_DWC3_CLK				     141

#define CNOC_MSMBUS_CLK				     142

#define CNOC_MSMBUS_A_CLK			     143

#define CNOC_KEEPALIVE_A_CLK		     144

#define SNOC_KEEPALIVE_A_CLK			 145

#define CPP_MMNRT_MSMBUS_CLK			 146

#define CPP_MMNRT_MSMBUS_A_CLK			 147

#define JPEG_MMNRT_MSMBUS_CLK			 148

#define JPEG_MMNRT_MSMBUS_A_CLK			 149

#define VENUS_MMNRT_MSMBUS_CLK			 150

#define VENUS_MMNRT_MSMBUS_A_CLK		 151

#define ARM9_MMNRT_MSMBUS_CLK			 152

#define ARM9_MMNRT_MSMBUS_A_CLK			 153

#define MDP_MMRT_MSMBUS_CLK			     154

#define MDP_MMRT_MSMBUS_A_CLK			 155

#define VFE_MMRT_MSMBUS_CLK			     156

#define VFE_MMRT_MSMBUS_A_CLK			 157

#define QUP0_MSMBUS_SNOC_PERIPH_CLK			158

#define QUP0_MSMBUS_SNOC_PERIPH_A_CLK	    159

#define QUP1_MSMBUS_SNOC_PERIPH_CLK		    160

#define QUP1_MSMBUS_SNOC_PERIPH_A_CLK	    161

#define QUP2_MSMBUS_SNOC_PERIPH_CLK         162

#define QUP2_MSMBUS_SNOC_PERIPH_A_CLK       163

#define DAP_MSMBUS_SNOC_PERIPH_CLK		    164

#define DAP_MSMBUS_SNOC_PERIPH_A_CLK	    165

#define SDC1_MSMBUS_SNOC_PERIPH_CLK		    166

#define SDC1_MSMBUS_SNOC_PERIPH_A_CLK	    167

#define SDC2_MSMBUS_SNOC_PERIPH_CLK		    168

#define SDC2_MSMBUS_SNOC_PERIPH_A_CLK	    169

#define CRYPTO_MSMBUS_SNOC_PERIPH_CLK	    170

#define CRYPTO_MSMBUS_SNOC_PERIPH_A_CLK		171

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_CLK		172

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_A_CLK	173

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_CLK		174

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_A_CLK	175

#define AGGR2_NOC_MSMBUS_CLK		        176

#define AGGR2_NOC_MSMBUS_A_CLK		        177

#define AGGR2_NOC_SMMU_CLK			        178

#define AGGR2_NOC_USB_CLK			        179



#endif