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Commit 06be2efa authored by Rabin Vincent's avatar Rabin Vincent Committed by Linus Walleij
Browse files

mach-ux500: update SoC and board IRQ handling 



This splits out a per-SoC IRQ range handling, so that the
DB8500 and DB5500 SoC:s can reuse aproximately the same IRQ
range with the largest span setting the roof. The same change
is done for the boards, mutatis mutandis, with a new file for
the U5500 board.

Signed-off-by: default avatarRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent b2596259

arch/arm/mach-ux500/include/mach/irqs-board-mop500.h

+5 −0
Original line number Diff line number Diff line
@@ -50,6 +50,11 @@ 


#define MOP500_IRQ_END		MOP500_NR_IRQS



/*

 * We may have several boards, but only one will run at a

 * time, so the one with most IRQs will bump this ahead,

 * but the IRQ_BOARD_START remains the same for either board.

 */

#if MOP500_IRQ_END > IRQ_BOARD_END

#undef IRQ_BOARD_END

#define IRQ_BOARD_END	MOP500_IRQ_END

arch/arm/mach-ux500/include/mach/irqs-board-u5500.h

0 → 100644
+21 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) ST-Ericsson SA 2010

 *

 * License terms: GNU General Public License (GPL) version 2

 */



#ifndef __MACH_IRQS_BOARD_U5500_H

#define __MACH_IRQS_BOARD_U5500_H



#define AB5500_NR_IRQS		5

#define IRQ_AB5500_BASE		IRQ_BOARD_START

#define IRQ_AB5500_END		(IRQ_AB5500_BASE + AB5500_NR_IRQS)



#define U5500_IRQ_END		IRQ_AB5500_END



#if IRQ_BOARD_END < U5500_IRQ_END

#undef IRQ_BOARD_END

#define IRQ_BOARD_END		U5500_IRQ_END

#endif



#endif

arch/arm/mach-ux500/include/mach/irqs-db5500.h

+27 −0
Original line number Diff line number Diff line
@@ -83,4 +83,31 @@ 
#define IRQ_DB5500_GPIO6		(IRQ_SHPI_START + 125)

#define IRQ_DB5500_GPIO7		(IRQ_SHPI_START + 126)



#ifdef CONFIG_UX500_SOC_DB5500



/*

 * After the GPIO ones we reserve a range of IRQ:s in which virtual

 * IRQ:s representing modem IRQ:s can be allocated

 */

#define IRQ_MODEM_EVENTS_BASE	IRQ_SOC_START

#define IRQ_MODEM_EVENTS_NBR	72

#define IRQ_MODEM_EVENTS_END	(IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR)



/* List of virtual IRQ:s that are allocated from the range above */

#define MBOX_PAIR0_VIRT_IRQ	(IRQ_MODEM_EVENTS_BASE + 43)

#define MBOX_PAIR1_VIRT_IRQ	(IRQ_MODEM_EVENTS_BASE + 45)

#define MBOX_PAIR2_VIRT_IRQ	(IRQ_MODEM_EVENTS_BASE + 41)



/*

 * We may have several SoCs, but only one will run at a

 * time, so the one with most IRQs will bump this ahead,

 * but the IRQ_SOC_START remains the same for either SoC.

 */

#if IRQ_SOC_END < IRQ_MODEM_EVENTS_END

#undef IRQ_SOC_END

#define IRQ_SOC_END		IRQ_MODEM_EVENTS_END

#endif



#endif /* CONFIG_UX500_SOC_DB5500 */



#endif

arch/arm/mach-ux500/include/mach/irqs-db8500.h

+54 −0
Original line number Diff line number Diff line
@@ -93,4 +93,58 @@ 
#define IRQ_DB8500_GPIO7		(IRQ_SHPI_START + 126)

#define IRQ_DB8500_GPIO8		(IRQ_SHPI_START + 127)



#define IRQ_CA_WAKE_REQ_ED			(IRQ_SHPI_START + 71)

#define IRQ_AC_READ_NOTIFICATION_0_ED		(IRQ_SHPI_START + 66)

#define IRQ_AC_READ_NOTIFICATION_1_ED		(IRQ_SHPI_START + 64)

#define IRQ_CA_MSG_PEND_NOTIFICATION_0_ED	(IRQ_SHPI_START + 67)

#define IRQ_CA_MSG_PEND_NOTIFICATION_1_ED	(IRQ_SHPI_START + 65)



#define IRQ_CA_WAKE_REQ_V1			(IRQ_SHPI_START + 83)

#define IRQ_AC_READ_NOTIFICATION_0_V1		(IRQ_SHPI_START + 78)

#define IRQ_AC_READ_NOTIFICATION_1_V1		(IRQ_SHPI_START + 76)

#define IRQ_CA_MSG_PEND_NOTIFICATION_0_V1	(IRQ_SHPI_START + 79)

#define IRQ_CA_MSG_PEND_NOTIFICATION_1_V1	(IRQ_SHPI_START + 77)



#ifdef CONFIG_UX500_SOC_DB8500



/* Virtual interrupts corresponding to the PRCMU wakeups.  */

#define IRQ_PRCMU_BASE IRQ_SOC_START

#define NUM_PRCMU_WAKEUPS (IRQ_PRCMU_END - IRQ_PRCMU_BASE)



#define IRQ_PRCMU_RTC (IRQ_PRCMU_BASE)

#define IRQ_PRCMU_RTT0 (IRQ_PRCMU_BASE + 1)

#define IRQ_PRCMU_RTT1 (IRQ_PRCMU_BASE + 2)

#define IRQ_PRCMU_HSI0 (IRQ_PRCMU_BASE + 3)

#define IRQ_PRCMU_HSI1 (IRQ_PRCMU_BASE + 4)

#define IRQ_PRCMU_CA_WAKE (IRQ_PRCMU_BASE + 5)

#define IRQ_PRCMU_USB (IRQ_PRCMU_BASE + 6)

#define IRQ_PRCMU_ABB (IRQ_PRCMU_BASE + 7)

#define IRQ_PRCMU_ABB_FIFO (IRQ_PRCMU_BASE + 8)

#define IRQ_PRCMU_ARM (IRQ_PRCMU_BASE + 9)

#define IRQ_PRCMU_MODEM_SW_RESET_REQ (IRQ_PRCMU_BASE + 10)

#define IRQ_PRCMU_GPIO0 (IRQ_PRCMU_BASE + 11)

#define IRQ_PRCMU_GPIO1 (IRQ_PRCMU_BASE + 12)

#define IRQ_PRCMU_GPIO2 (IRQ_PRCMU_BASE + 13)

#define IRQ_PRCMU_GPIO3 (IRQ_PRCMU_BASE + 14)

#define IRQ_PRCMU_GPIO4 (IRQ_PRCMU_BASE + 15)

#define IRQ_PRCMU_GPIO5 (IRQ_PRCMU_BASE + 16)

#define IRQ_PRCMU_GPIO6 (IRQ_PRCMU_BASE + 17)

#define IRQ_PRCMU_GPIO7 (IRQ_PRCMU_BASE + 18)

#define IRQ_PRCMU_GPIO8 (IRQ_PRCMU_BASE + 19)

#define IRQ_PRCMU_CA_SLEEP (IRQ_PRCMU_BASE + 20)

#define IRQ_PRCMU_HOTMON_LOW (IRQ_PRCMU_BASE + 21)

#define IRQ_PRCMU_HOTMON_HIGH (IRQ_PRCMU_BASE + 22)

#define IRQ_PRCMU_END (IRQ_PRCMU_BASE + 23)



/*

 * We may have several SoCs, but only one will run at a

 * time, so the one with most IRQs will bump this ahead,

 * but the IRQ_SOC_START remains the same for either SoC.

 */

#if IRQ_SOC_END < IRQ_PRCMU_END

#undef IRQ_SOC_END

#define IRQ_SOC_END IRQ_PRCMU_END

#endif



#endif /* CONFIG_UX500_SOC_DB8500 */

#endif

arch/arm/mach-ux500/include/mach/irqs.h

+22 −24
Original line number Diff line number Diff line
@@ -10,8 +10,7 @@ 
#ifndef ASM_ARCH_IRQS_H

#define ASM_ARCH_IRQS_H



#include <mach/irqs-db5500.h>

#include <mach/irqs-db8500.h>

#include <mach/hardware.h>



#define IRQ_LOCALTIMER			29

#define IRQ_LOCALWDOG			30
@@ -19,20 +18,28 @@ 
/* Shared Peripheral Interrupt (SHPI) */

#define IRQ_SHPI_START			32



/* Interrupt numbers generic for shared peripheral */

/*

 * MTU0 preserved for now until plat-nomadik is taught not to use it.  Don't

 * add any other IRQs here, use the irqs-dbx500.h files.

 */

#define IRQ_MTU0		(IRQ_SHPI_START + 4)



/* There are 128 shared peripheral interrupts assigned to

 * INTID[160:32]. The first 32 interrupts are reserved.

 */

#define DBX500_NR_INTERNAL_IRQS		161

#define DBX500_NR_INTERNAL_IRQS		160



/* After chip-specific IRQ numbers we have the GPIO ones */

#define NOMADIK_NR_GPIO			288

#define NOMADIK_GPIO_TO_IRQ(gpio)	((gpio) + DBX500_NR_INTERNAL_IRQS)

#define NOMADIK_IRQ_TO_GPIO(irq)	((irq) - DBX500_NR_INTERNAL_IRQS)

#define IRQ_BOARD_START			NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)

#define IRQ_GPIO_END			NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)



#define IRQ_SOC_START		IRQ_GPIO_END

/* This will be overridden by SoC-specific irq headers */

#define IRQ_SOC_END		IRQ_SOC_START



#include <mach/irqs-db5500.h>

#include <mach/irqs-db8500.h>



#define IRQ_BOARD_START		IRQ_SOC_END

/* This will be overridden by board-specific irq headers */

#define IRQ_BOARD_END		IRQ_BOARD_START
@@ -40,19 +47,10 @@ 
#include <mach/irqs-board-mop500.h>

#endif



/*

 * After the board specific IRQ:s we reserve a range of IRQ:s in which virtual

 * IRQ:s representing modem IRQ:s can be allocated

 */

#define IRQ_MODEM_EVENTS_BASE (IRQ_BOARD_END + 1)

#define IRQ_MODEM_EVENTS_NBR 72

#define IRQ_MODEM_EVENTS_END (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR)



/* List of virtual IRQ:s that are allocated from the range above */

#define MBOX_PAIR0_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 43)

#define MBOX_PAIR1_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 45)

#define MBOX_PAIR2_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 41)

#ifdef CONFIG_MACH_U5500

#include <mach/irqs-board-u5500.h>

#endif



#define NR_IRQS				IRQ_MODEM_EVENTS_END

#define NR_IRQS			IRQ_BOARD_END



#endif /* ASM_ARCH_IRQS_H */