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Commit 068715b9 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/cmdparser: Add the TIMESTAMP register for the other engines 



Since I have been using the BCS_TIMESTAMP to measure latency of
execution upon the blitter ring, allow regular userspace to also read
from that register. They are already allowed RCS_TIMESTAMP!

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160818161718.27187-32-chris@chris-wilson.co.uk
parent 7756e454

drivers/gpu/drm/i915/i915_cmd_parser.c

+5 −0
Original line number Diff line number Diff line
@@ -458,6 +458,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = { 
	REG32(GEN7_GPGPU_DISPATCHDIMX),

	REG32(GEN7_GPGPU_DISPATCHDIMY),

	REG32(GEN7_GPGPU_DISPATCHDIMZ),

	REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),

	REG64_IDX(GEN7_SO_NUM_PRIMS_WRITTEN, 0),

	REG64_IDX(GEN7_SO_NUM_PRIMS_WRITTEN, 1),

	REG64_IDX(GEN7_SO_NUM_PRIMS_WRITTEN, 2),
@@ -473,6 +474,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = { 
	REG32(GEN7_L3SQCREG1),

	REG32(GEN7_L3CNTLREG2),

	REG32(GEN7_L3CNTLREG3),

	REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),

};



static const struct drm_i915_reg_descriptor hsw_render_regs[] = {
@@ -502,7 +504,10 @@ static const struct drm_i915_reg_descriptor hsw_render_regs[] = { 
};



static const struct drm_i915_reg_descriptor gen7_blt_regs[] = {

	REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),

	REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),

	REG32(BCS_SWCTRL),

	REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),

};



static const struct drm_i915_reg_descriptor ivb_master_regs[] = {