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Commit 06371eb9 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: Add support for debugcc for LITO"

parents 112794dd 5ce2435a
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+1 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. Debug Clock Controller Binding
----------------------------------------------------------

Required properties :
- compatible: Shall contain "qcom,kona-debugcc".
- compatible: Shall contain "qcom,kona-debugcc" or "qcom,lito-debugcc".
- qcom,gcc: phandle to the GCC device node.
- qcom,videocc: phandle to the Video CC device node.
- qcom,camcc: phandle to the Camera CC device node.
+8 −0
Original line number Diff line number Diff line
@@ -401,3 +401,11 @@ config SM_NPUCC_LITO
          LITO devices.
          Say Y if you want to enable use of the Network Processing Unit in
          order to speed up certain types of calculations.

config SM_DEBUGCC_LITO
	tristate "LITO Debug Clock Controller"
	depends on COMMON_CLK_QCOM
	help
	  Support for the debug clock controller on Qualcomm Technologies, Inc
	  LITO devices.
	  Say Y if you want to support the clock measurement functionality.
+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o
obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o
obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o
obj-$(CONFIG_SM_CAMCC_LITO) += camcc-lito.o
obj-$(CONFIG_SM_DEBUGCC_LITO) += debugcc-lito.o
obj-$(CONFIG_SM_DISPCC_LITO) += dispcc-lito.o
obj-$(CONFIG_SM_GCC_LITO) += gcc-lito.o
obj-$(CONFIG_SM_NPUCC_LITO) += npucc-lito.o
+811 −0

File added.

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+46 −1
Original line number Diff line number Diff line
@@ -2354,6 +2354,45 @@ static struct clk_branch gcc_video_xo_clk = {
	},
};

/* Measure only clocks */
static struct clk_dummy l3_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "l3_clk",
		.ops = &clk_dummy_ops,
	},
};

static struct clk_dummy pwrcl_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "pwrcl_clk",
		.ops = &clk_dummy_ops,
	},
};

static struct clk_dummy perfcl_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "perfcl_clk",
		.ops = &clk_dummy_ops,
	},
};

static struct clk_dummy perfpcl_clk = {
	.rrate = 1000,
	.hw.init = &(struct clk_init_data){
		.name = "perfpcl_clk",
		.ops = &clk_dummy_ops,
	},
};
static struct clk_hw *gcc_lito_hws[] = {
	&l3_clk.hw,
	&pwrcl_clk.hw,
	&perfcl_clk.hw,
	&perfpcl_clk.hw,
};

static struct clk_regmap *gcc_lito_clocks[] = {
	[GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
	[GCC_AGGRE_USB3_PRIM_AXI_CLK] = &gcc_aggre_usb3_prim_axi_clk.clkr,
@@ -2543,7 +2582,7 @@ MODULE_DEVICE_TABLE(of, gcc_lito_match_table);
static int gcc_lito_probe(struct platform_device *pdev)
{
	struct regmap *regmap;
	int ret;
	int ret, i;

	regmap = qcom_cc_map(pdev, &gcc_lito_desc);
	if (IS_ERR(regmap))
@@ -2574,6 +2613,12 @@ static int gcc_lito_probe(struct platform_device *pdev)
	regmap_update_bits(regmap, GCC_NPU_MISC, 0x3, 0x3);
	regmap_update_bits(regmap, GCC_GPU_MISC, 0x3, 0x3);

	for (i = 0; i < ARRAY_SIZE(gcc_lito_hws); i++) {
		ret = devm_clk_hw_register(&pdev->dev, gcc_lito_hws[i]);
		if (ret)
			return ret;
	}

	ret = qcom_cc_really_probe(pdev, &gcc_lito_desc, regmap);
	if (ret) {
		dev_err(&pdev->dev, "Failed to register GCC clocks\n");