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Commit 060a73f4 authored by Karthik Anantha Ram's avatar Karthik Anantha Ram Committed by Gerrit - the friendly Code Review server
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msm: camera: icp: Use camera hw version to check num of ipe cores 



The cpas hw capability bit has been changed for kona, hence use
the hw version to determine number of ipe cores.

Change-Id: I4402c71237235490feb9771994db858e3de2d6a0
Signed-off-by: default avatarKarthik Anantha Ram <kartanan@codeaurora.org>
parent 9d2c3982

drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c

+16 −7
Original line number Diff line number Diff line
@@ -4726,7 +4726,7 @@ int cam_icp_hw_mgr_init(struct device_node *of_node, uint64_t *hw_mgr_hdl, 
	int i, rc = 0;

	struct cam_hw_mgr_intf *hw_mgr_intf;

	struct cam_cpas_query_cap query;

	uint32_t cam_caps;

	uint32_t cam_caps, camera_hw_version;



	hw_mgr_intf = (struct cam_hw_mgr_intf *)hw_mgr_hdl;

	if (!of_node || !hw_mgr_intf) {
@@ -4755,12 +4755,21 @@ int cam_icp_hw_mgr_init(struct device_node *of_node, uint64_t *hw_mgr_hdl, 


	cam_cpas_get_hw_info(&query.camera_family,

		&query.camera_version, &query.cpas_version, &cam_caps);

	cam_cpas_get_cpas_hw_version(&camera_hw_version);



	if (camera_hw_version == CAM_CPAS_TITAN_480_V100) {

		if (cam_caps & CPAS_TITAN_480_IPE0_BIT)

			icp_hw_mgr.ipe0_enable = true;

		if (cam_caps & CPAS_BPS_BIT)

			icp_hw_mgr.bps_enable = true;

	} else {

		if (cam_caps & CPAS_IPE0_BIT)

			icp_hw_mgr.ipe0_enable = true;

		if (cam_caps & CPAS_IPE1_BIT)

			icp_hw_mgr.ipe1_enable = true;

		if (cam_caps & CPAS_BPS_BIT)

			icp_hw_mgr.bps_enable = true;

	}



	rc = cam_icp_mgr_init_devs(of_node);

	if (rc)

drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h

+2 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

 */



#ifndef CAM_ICP_HW_MGR_H
@@ -51,6 +51,7 @@ 
#define CPAS_IPE0_BIT           0x1000

#define CPAS_IPE1_BIT           0x2000

#define CPAS_BPS_BIT            0x400

#define CPAS_TITAN_480_IPE0_BIT 0x800



#define ICP_PWR_CLP_BPS         0x00000001

#define ICP_PWR_CLP_IPE0        0x00010000