drm/etnaviv: update hardware headers from rnndb

git clone git://0x04.net/rules-ng-ng

The rules-ng-ng source files this header was generated from are:

- state.xml     (  19930 bytes, from 2017-03-09 15:43:43)

- common.xml    (  23473 bytes, from 2017-03-09 15:43:43)

- state_hi.xml  (  26403 bytes, from 2017-03-09 15:43:43)

- texdesc_3d.xml (   3183 bytes, from 2017-12-18 16:51:59)

- copyright.xml  (   1597 bytes, from 2016-12-08 16:37:56)

- state_2d.xml  (  51552 bytes, from 2016-12-08 16:37:56)

- state_3d.xml  (  66957 bytes, from 2017-03-09 15:43:43)

- state_vg.xml  (   5975 bytes, from 2016-12-08 16:37:56)

- common.xml     (  35468 bytes, from 2018-01-22 13:48:54)

- common_3d.xml  (  14615 bytes, from 2017-12-18 16:51:59)

Copyright (C) 2012-2017 by the following authors:

Copyright (C) 2012-2018 by the following authors:

- Wladimir J. van der Laan <laanwj@gmail.com>

- Christian Gmeiner <christian.gmeiner@gmail.com>

- Lucas Stach <l.stach@pengutronix.de>

#define SYNC_RECIPIENT_RA					0x00000005

#define SYNC_RECIPIENT_PE					0x00000007

#define SYNC_RECIPIENT_DE					0x0000000b

#define SYNC_RECIPIENT_VG					0x0000000f

#define SYNC_RECIPIENT_TESSELATOR				0x00000010

#define SYNC_RECIPIENT_VG2					0x00000011

#define SYNC_RECIPIENT_TESSELATOR2				0x00000012

#define SYNC_RECIPIENT_VG3					0x00000013

#define SYNC_RECIPIENT_TESSELATOR3				0x00000014

#define SYNC_RECIPIENT_BLT					0x00000010

#define ENDIAN_MODE_NO_SWAP					0x00000000

#define ENDIAN_MODE_SWAP_16					0x00000001

#define ENDIAN_MODE_SWAP_32					0x00000002

#define chipModel_GC800						0x00000800

#define chipModel_GC860						0x00000860

#define chipModel_GC880						0x00000880

#define chipModel_GC900						0x00000900

#define chipModel_GC1000					0x00001000

#define chipModel_GC1500					0x00001500

#define chipModel_GC2000					0x00002000

#define chipModel_GC5000					0x00005000

#define chipModel_GC5200					0x00005200

#define chipModel_GC6400					0x00006400

#define chipModel_GC7000					0x00007000

#define chipModel_GC7400					0x00007400

#define chipModel_GC8000					0x00008000

#define chipModel_GC8100					0x00008100

#define chipModel_GC8200					0x00008200

#define chipModel_GC8400					0x00008400

#define RGBA_BITS_R						0x00000001

#define RGBA_BITS_G						0x00000002

#define RGBA_BITS_B						0x00000004

#define chipMinorFeatures2_RGB888				0x00001000

#define chipMinorFeatures2_TX__YUV_ASSEMBLER			0x00002000

#define chipMinorFeatures2_DYNAMIC_FREQUENCY_SCALING		0x00004000

#define chipMinorFeatures2_EXTRA_TEXTURE_STATE			0x00008000

#define chipMinorFeatures2_TX_FILTER				0x00008000

#define chipMinorFeatures2_FULL_DIRECTFB			0x00010000

#define chipMinorFeatures2_2D_TILING				0x00020000

#define chipMinorFeatures2_THREAD_WALKER_IN_PS			0x00040000

#define chipMinorFeatures3_TX_ENHANCEMENTS1			0x00080000

#define chipMinorFeatures3_SH_ENHANCEMENTS1			0x00100000

#define chipMinorFeatures3_SH_ENHANCEMENTS2			0x00200000

#define chipMinorFeatures3_UNK22				0x00400000

#define chipMinorFeatures3_PE_ENHANCEMENTS1			0x00400000

#define chipMinorFeatures3_2D_FC_SOURCE				0x00800000

#define chipMinorFeatures3_UNK24				0x01000000

#define chipMinorFeatures3_UNK25				0x02000000

#define chipMinorFeatures3_BUG_FIXES_14				0x01000000

#define chipMinorFeatures3_POWER_OPTIMIZATIONS_0		0x02000000

#define chipMinorFeatures3_NEW_HZ				0x04000000

#define chipMinorFeatures3_UNK27				0x08000000

#define chipMinorFeatures3_UNK28				0x10000000

#define chipMinorFeatures3_PE_DITHER_FIX			0x08000000

#define chipMinorFeatures3_DE_ENHANCEMENTS3			0x10000000

#define chipMinorFeatures3_SH_ENHANCEMENTS3			0x20000000

#define chipMinorFeatures3_UNK30				0x40000000

#define chipMinorFeatures3_UNK31				0x80000000

#define chipMinorFeatures4_UNK0					0x00000001

#define chipMinorFeatures3_SH_ENHANCEMENTS4			0x40000000

#define chipMinorFeatures3_TX_ENHANCEMENTS2			0x80000000

#define chipMinorFeatures4_FE_ENHANCEMENTS1			0x00000001

#define chipMinorFeatures4_PE_ENHANCEMENTS2			0x00000002

#define chipMinorFeatures4_FRUSTUM_CLIP_FIX			0x00000004

#define chipMinorFeatures4_UNK3					0x00000008

#define chipMinorFeatures4_UNK4					0x00000010

#define chipMinorFeatures4_DE_NO_GAMMA				0x00000008

#define chipMinorFeatures4_PA_ENHANCEMENTS_2			0x00000010

#define chipMinorFeatures4_2D_GAMMA				0x00000020

#define chipMinorFeatures4_SINGLE_BUFFER			0x00000040

#define chipMinorFeatures4_UNK7					0x00000080

#define chipMinorFeatures4_UNK8					0x00000100

#define chipMinorFeatures4_UNK9					0x00000200

#define chipMinorFeatures4_UNK10				0x00000400

#define chipMinorFeatures4_HI_ENHANCEMENTS_1			0x00000080

#define chipMinorFeatures4_TX_ENHANCEMENTS_3			0x00000100

#define chipMinorFeatures4_SH_ENHANCEMENTS_5			0x00000200

#define chipMinorFeatures4_FE_ENHANCEMENTS_2			0x00000400

#define chipMinorFeatures4_TX_LERP_PRECISION_FIX		0x00000800

#define chipMinorFeatures4_2D_COLOR_SPACE_CONVERSION		0x00001000

#define chipMinorFeatures4_TEXTURE_ASTC				0x00002000

#define chipMinorFeatures4_UNK14				0x00004000

#define chipMinorFeatures4_UNK15				0x00008000

#define chipMinorFeatures4_PE_ENHANCEMENTS_4			0x00004000

#define chipMinorFeatures4_MC_ENHANCEMENTS_1			0x00008000

#define chipMinorFeatures4_HALTI2				0x00010000

#define chipMinorFeatures4_UNK17				0x00020000

#define chipMinorFeatures4_2D_MIRROR_EXTENSION			0x00020000

#define chipMinorFeatures4_SMALL_MSAA				0x00040000

#define chipMinorFeatures4_UNK19				0x00080000

#define chipMinorFeatures4_BUG_FIXES_17				0x00080000

#define chipMinorFeatures4_NEW_RA				0x00100000

#define chipMinorFeatures4_2D_OPF_YUV_OUTPUT			0x00200000

#define chipMinorFeatures4_2D_MULTI_SOURCE_BLT_EX2		0x00400000

#define chipMinorFeatures4_BUG_FIXES18				0x02000000

#define chipMinorFeatures4_2D_COMPRESSION			0x04000000

#define chipMinorFeatures4_PROBE				0x08000000

#define chipMinorFeatures4_UNK28				0x10000000

#define chipMinorFeatures4_MEDIUM_PRECISION			0x10000000

#define chipMinorFeatures4_2D_SUPER_TILE_VERSION		0x20000000

#define chipMinorFeatures4_UNK30				0x40000000

#define chipMinorFeatures4_UNK31				0x80000000

#define chipMinorFeatures5_UNK0					0x00000001

#define chipMinorFeatures5_UNK1					0x00000002

#define chipMinorFeatures5_UNK2					0x00000004

#define chipMinorFeatures5_UNK3					0x00000008

#define chipMinorFeatures4_BUG_FIXES19				0x40000000

#define chipMinorFeatures4_SH_ENHANCEMENTS6			0x80000000

#define chipMinorFeatures5_SH_ENHANCEMENTS7			0x00000001

#define chipMinorFeatures5_BUG_FIXES20				0x00000002

#define chipMinorFeatures5_DE_ADDRESS_40			0x00000004

#define chipMinorFeatures5_MINI_MMU_FIX				0x00000008

#define chipMinorFeatures5_EEZ					0x00000010

#define chipMinorFeatures5_UNK5					0x00000020

#define chipMinorFeatures5_UNK6					0x00000040

#define chipMinorFeatures5_UNK7					0x00000080

#define chipMinorFeatures5_UNK8					0x00000100

#define chipMinorFeatures5_BUG_FIXES21				0x00000020

#define chipMinorFeatures5_EXTRA_VG_CAPS			0x00000040

#define chipMinorFeatures5_MULTI_SRC_V15			0x00000080

#define chipMinorFeatures5_BUG_FIXES22				0x00000100

#define chipMinorFeatures5_HALTI3				0x00000200

#define chipMinorFeatures5_UNK10				0x00000400

#define chipMinorFeatures5_TESSELATION_SHADERS			0x00000400

#define chipMinorFeatures5_2D_ONE_PASS_FILTER_TAP		0x00000800

#define chipMinorFeatures5_UNK12				0x00001000

#define chipMinorFeatures5_MULTI_SRC_V2_STR_QUAD		0x00001000

#define chipMinorFeatures5_SEPARATE_SRC_DST			0x00002000

#define chipMinorFeatures5_HALTI4				0x00004000

#define chipMinorFeatures5_UNK15				0x00008000

#define chipMinorFeatures5_RA_WRITE_DEPTH			0x00008000

#define chipMinorFeatures5_ANDROID_ONLY				0x00010000

#define chipMinorFeatures5_HAS_PRODUCTID			0x00020000

#define chipMinorFeatures5_UNK18				0x00040000

#define chipMinorFeatures5_UNK19				0x00080000

#define chipMinorFeatures5_TX_SUPPORT_DEC			0x00040000

#define chipMinorFeatures5_S8_MSAA_COMPRESSION			0x00080000

#define chipMinorFeatures5_PE_DITHER_FIX2			0x00100000

#define chipMinorFeatures5_UNK21				0x00200000

#define chipMinorFeatures5_UNK22				0x00400000

#define chipMinorFeatures5_UNK23				0x00800000

#define chipMinorFeatures5_UNK24				0x01000000

#define chipMinorFeatures5_UNK25				0x02000000

#define chipMinorFeatures5_UNK26				0x04000000

#define chipMinorFeatures5_L2_CACHE_REMOVE			0x00200000

#define chipMinorFeatures5_FE_ALLOW_RND_VTX_CNT			0x00400000

#define chipMinorFeatures5_CUBE_MAP_FL28			0x00800000

#define chipMinorFeatures5_TX_6BIT_FRAC				0x01000000

#define chipMinorFeatures5_FE_ALLOW_STALL_PREFETCH_ENG		0x02000000

#define chipMinorFeatures5_THIRD_PARTY_COMPRESSION		0x04000000

#define chipMinorFeatures5_RS_DEPTHSTENCIL_NATIVE_SUPPORT	0x08000000

#define chipMinorFeatures5_V2_MSAA_COMP_FIX			0x10000000

#define chipMinorFeatures5_UNK29				0x20000000

#define chipMinorFeatures5_UNK30				0x40000000

#define chipMinorFeatures5_UNK31				0x80000000

#define chipMinorFeatures5_HALTI5				0x20000000

#define chipMinorFeatures5_EVIS					0x40000000

#define chipMinorFeatures5_BLT_ENGINE				0x80000000

#define chipMinorFeatures6_BUG_FIXES_23				0x00000001

#define chipMinorFeatures6_BUG_FIXES_24				0x00000002

#define chipMinorFeatures6_DEC					0x00000004

#define chipMinorFeatures6_VS_TILE_NV12				0x00000008

#define chipMinorFeatures6_VS_TILE_NV12_10BIT			0x00000010

#define chipMinorFeatures6_RENDER_TARGET_8			0x00000020

#define chipMinorFeatures6_TEX_LOD_FLOW_CORR			0x00000040

#define chipMinorFeatures6_FACE_LOD				0x00000080

#define chipMinorFeatures6_MULTI_CORE_SEMAPHORE_STALL_V2	0x00000100

#define chipMinorFeatures6_VMSAA				0x00000200

#define chipMinorFeatures6_CHIP_ENABLE_LINK			0x00000400

#define chipMinorFeatures6_MULTI_SRC_BLT_1_5_ENHANCEMENT	0x00000800

#define chipMinorFeatures6_MULTI_SRC_BLT_BILINEAR_FILTER	0x00001000

#define chipMinorFeatures6_RA_HZEZ_CLOCK_CONTROL		0x00002000

#define chipMinorFeatures6_CACHE128B256BPERLINE			0x00004000

#define chipMinorFeatures6_V4_COMPRESSION			0x00008000

#define chipMinorFeatures6_PE2D_MAJOR_SUPER_TILE		0x00010000

#define chipMinorFeatures6_PE_32BPC_COLORMASK_FIX		0x00020000

#define chipMinorFeatures6_ALPHA_BLENDING_OPT			0x00040000

#define chipMinorFeatures6_NEW_GPIPE				0x00080000

#define chipMinorFeatures6_PIPELINE_32_ATTRIBUTES		0x00100000

#define chipMinorFeatures6_MSAA_SHADING				0x00200000

#define chipMinorFeatures6_NO_ANISTRO_FILTER			0x00400000

#define chipMinorFeatures6_NO_ASTC				0x00800000

#define chipMinorFeatures6_NO_DXT				0x01000000

#define chipMinorFeatures6_HWTFB				0x02000000

#define chipMinorFeatures6_RA_DEPTH_WRITE_MSAA1X_FIX		0x04000000

#define chipMinorFeatures6_EZHZ_CLOCKGATE_FIX			0x08000000

#define chipMinorFeatures6_SH_SNAP2PAGE_FIX			0x10000000

#define chipMinorFeatures6_SH_HALFDEPENDENCY_FIX		0x20000000

#define chipMinorFeatures6_USC_MCFILL_FIX			0x40000000

#define chipMinorFeatures6_TPG_TCPERF_FIX			0x80000000

#define chipMinorFeatures7_USC_MDFIFO_OVERFLOW_FIX		0x00000001

#define chipMinorFeatures7_SH_TEXLD_BARRIER_IN_CS_FIX		0x00000002

#define chipMinorFeatures7_RS_NEW_BASEADDR			0x00000004

#define chipMinorFeatures7_PE_8BPP_DUALPIPE_FIX			0x00000008

#define chipMinorFeatures7_SH_ADVANCED_INSTR			0x00000010

#define chipMinorFeatures7_SH_FLAT_INTERPOLATION_DUAL16_FIX	0x00000020

#define chipMinorFeatures7_USC_CONTINUOUS_FLUS_FIX		0x00000040

#define chipMinorFeatures7_SH_SUPPORT_V4			0x00000080

#define chipMinorFeatures7_SH_SUPPORT_ALPHA_KILL		0x00000100

#define chipMinorFeatures7_PE_NO_ALPHA_TEST			0x00000200

#define chipMinorFeatures7_TX_LOD_NEAREST_SELECT		0x00000400

#define chipMinorFeatures7_SH_FIX_LDEXP				0x00000800

#define chipMinorFeatures7_SUPPORT_MOVAI			0x00001000

#define chipMinorFeatures7_SH_SNAP2PAGE_MAXPAGES_FIX		0x00002000

#define chipMinorFeatures7_PE_RGBA16I_FIX			0x00004000

#define chipMinorFeatures7_BLT_8bpp_256TILE_FC_FIX		0x00008000

#define chipMinorFeatures7_PE_64BIT_FENCE_FIX			0x00010000

#define chipMinorFeatures7_USC_FULL_CACHE_FIX			0x00020000

#define chipMinorFeatures7_TX_YUV_ASSEMBLER_10BIT		0x00040000

#define chipMinorFeatures7_FE_32BIT_INDEX_FIX			0x00080000

#define chipMinorFeatures7_BLT_64BPP_MASKED_CLEAR_FIX		0x00100000

#define chipMinorFeatures7_BIT_SECURITY				0x00200000

#define chipMinorFeatures7_BIT_ROBUSTNESS			0x00400000

#define chipMinorFeatures7_USC_ATOMIC_FIX			0x00800000

#define chipMinorFeatures7_SH_PSO_MSAA1x_FIX			0x01000000

#define chipMinorFeatures7_BIT_USC_VX_PERF_FIX			0x02000000

#define chipMinorFeatures7_EVIS_NO_ABSDIFF			0x04000000

#define chipMinorFeatures7_EVIS_NO_BITREPLACE			0x08000000

#define chipMinorFeatures7_EVIS_NO_BOXFILTER			0x10000000

#define chipMinorFeatures7_EVIS_NO_CORDIAC			0x20000000

#define chipMinorFeatures7_EVIS_NO_DP32				0x40000000

#define chipMinorFeatures7_EVIS_NO_FILTER			0x80000000

#define chipMinorFeatures8_EVIS_NO_IADD				0x00000001

#define chipMinorFeatures8_EVIS_NO_SELECTADD			0x00000002

#define chipMinorFeatures8_EVIS_LERP_7OUTPUT			0x00000004

#define chipMinorFeatures8_EVIS_ACCSQ_8OUTPUT			0x00000008

#define chipMinorFeatures8_USC_GOS_ADDR_FIX			0x00000010

#define chipMinorFeatures8_TX_8BIT_UVFRAC			0x00000020

#define chipMinorFeatures8_TX_DESC_CACHE_CLOCKGATE_FIX		0x00000040

#define chipMinorFeatures8_RSBLT_MSAA_DECOMPRESSION		0x00000080

#define chipMinorFeatures8_TX_INTEGER_COORDINATE		0x00000100

#define chipMinorFeatures8_DRAWID				0x00000200

#define chipMinorFeatures8_PSIO_SAMPLEMASK_IN_R0ZW_FIX		0x00000400

#define chipMinorFeatures8_TX_INTEGER_COORDINATE_V2		0x00000800

#define chipMinorFeatures8_MULTI_CORE_BLOCK_SET_CONFIG		0x00001000

#define chipMinorFeatures8_VG_RESOLVE_ENGINE			0x00002000

#define chipMinorFeatures8_VG_PE_COLOR_KEY			0x00004000

#define chipMinorFeatures8_VG_IM_INDEX_FORMAT			0x00008000

#define chipMinorFeatures8_SNAPPAGE_CMD				0x00010000

#define chipMinorFeatures8_SH_NO_INDEX_CONST_ON_A0		0x00020000

#define chipMinorFeatures8_SH_NO_ONECONST_LIMIT			0x00040000

#define chipMinorFeatures8_SH_IMG_LDST_ON_TEMP			0x00080000

#define chipMinorFeatures8_COMPUTE_ONLY				0x00100000

#define chipMinorFeatures8_SH_IMG_LDST_CLAMP			0x00200000

#define chipMinorFeatures8_SH_ICACHE_ALLOC_COUNT_FIX		0x00400000

#define chipMinorFeatures8_SH_ICACHE_PREFETCH			0x00800000

#define chipMinorFeatures8_PE2D_SEPARATE_CACHE			0x01000000

#define chipMinorFeatures8_VG_AYUV_INPUT_OUTPUT			0x02000000

#define chipMinorFeatures8_VG_DOUBLE_IMAGE			0x04000000

#define chipMinorFeatures8_VG_RECTANGLE_STRIPE_MODE		0x08000000

#define chipMinorFeatures8_VG_MMU				0x10000000

#define chipMinorFeatures8_VG_IM_FILTER				0x20000000

#define chipMinorFeatures8_VG_IM_YUV_PACKET			0x40000000

#define chipMinorFeatures8_VG_IM_YUV_PLANAR			0x80000000

#define chipMinorFeatures9_VG_PE_YUV_PACKET			0x00000001

#define chipMinorFeatures9_VG_COLOR_PRECISION_8_BIT		0x00000002

#define chipMinorFeatures9_PE_MSAA_OQ_FIX			0x00000004

#define chipMinorFeatures9_PSIO_MSAA_CL_FIX			0x00000008

#define chipMinorFeatures9_USC_DEFER_FILL_FIX			0x00000010

#define chipMinorFeatures9_SH_CLOCK_GATE_FIX			0x00000020

#define chipMinorFeatures9_FE_NEED_DUMMYDRAW			0x00000040

#define chipMinorFeatures9_PE2D_LINEAR_YUV420_OUTPUT		0x00000080

#define chipMinorFeatures9_PE2D_LINEAR_YUV420_10BIT		0x00000100

#define chipMinorFeatures9_MULTI_CLUSTER			0x00000200

#define chipMinorFeatures9_VG_TS_CULLING			0x00000400

#define chipMinorFeatures9_VG_FP25				0x00000800

#define chipMinorFeatures9_SH_MULTI_WG_PACK			0x00001000

#define chipMinorFeatures9_SH_DUAL16_SAMPLEMASK_ZW		0x00002000

#define chipMinorFeatures9_TPG_TRIVIAL_MODE_FIX			0x00004000

#define chipMinorFeatures9_TX_ASTC_MULTISLICE_FIX		0x00008000

#define chipMinorFeatures9_FE_ROBUST_FIX			0x00010000

#define chipMinorFeatures9_SH_GPIPE_ACCESS_FULLTEMPS		0x00020000

#define chipMinorFeatures9_PSIO_INTERLOCK			0x00040000

#define chipMinorFeatures9_PA_WIDELINE_FIX			0x00080000

#define chipMinorFeatures9_WIDELINE_HELPER_FIX			0x00100000

#define chipMinorFeatures9_G2D_3RD_PARTY_COMPRESSION_1_1	0x00200000

#define chipMinorFeatures9_TX_FLUSH_L1CACHE			0x00400000

#define chipMinorFeatures9_PE_DITHER_FIX2			0x00800000

#define chipMinorFeatures9_G2D_DEC400				0x01000000

#define chipMinorFeatures9_SH_TEXLD_U_FIX			0x02000000

#define chipMinorFeatures9_MC_FCCACHE_BYTEMASK			0x04000000

#define chipMinorFeatures9_SH_MULTI_WG_PACK_FIX			0x08000000

#define chipMinorFeatures9_DC_OVERLAY_SCALING			0x10000000

#define chipMinorFeatures9_DC_SOURCE_ROTATION			0x20000000

#define chipMinorFeatures9_DC_TILED				0x40000000

#define chipMinorFeatures9_DC_YUV_L1				0x80000000

#define chipMinorFeatures10_DC_D30_OUTPUT			0x00000001

#define chipMinorFeatures10_DC_MMU				0x00000002

#define chipMinorFeatures10_DC_COMPRESSION			0x00000004

#define chipMinorFeatures10_DC_QOS				0x00000008

#define chipMinorFeatures10_PE_ADVANCE_BLEND_PART0		0x00000010

#define chipMinorFeatures10_FE_PATCHLIST_FETCH_FIX		0x00000020

#define chipMinorFeatures10_RA_CG_FIX				0x00000040

#define chipMinorFeatures10_EVIS_VX2				0x00000080

#define chipMinorFeatures10_NN_FLOAT				0x00000100

#define chipMinorFeatures10_DEC400				0x00000200

#define chipMinorFeatures10_LS_SUPPORT_PERCOMP_DEPENDENCY	0x00000400

#define chipMinorFeatures10_TP_ENGINE				0x00000800

#define chipMinorFeatures10_MULTI_CORE_BLOCK_SET_CONFIG2	0x00001000

#define chipMinorFeatures10_PE_VMSAA_COVERAGE_CACHE_FIX		0x00002000

#define chipMinorFeatures10_SECURITY_AHB			0x00004000

#define chipMinorFeatures10_MULTICORE_SEMAPHORESTALL_V3		0x00008000

#define chipMinorFeatures10_SMALLBATCH				0x00010000

#define chipMinorFeatures10_SH_CMPLX				0x00020000

#define chipMinorFeatures10_SH_IDIV0_SWZL_EHS			0x00040000

#define chipMinorFeatures10_TX_LERP_LESS_BIT			0x00080000

#define chipMinorFeatures10_SH_GM_ENDIAN			0x00100000

#define chipMinorFeatures10_SH_GM_USC_UNALLOC			0x00200000

#define chipMinorFeatures10_SH_END_OF_BB			0x00400000

#define chipMinorFeatures10_VIP_V7				0x00800000

#define chipMinorFeatures10_TX_BORDER_CLAMP_FIX			0x01000000

#define chipMinorFeatures10_SH_IMG_LD_LASTPIXEL_FIX		0x02000000

#define chipMinorFeatures10_ASYNC_BLT				0x04000000

#define chipMinorFeatures10_ASYNC_FE_FENCE_FIX			0x08000000

#define chipMinorFeatures10_PSCS_THROTTLE			0x10000000

#define chipMinorFeatures10_SEPARATE_LS				0x20000000

#define chipMinorFeatures10_MCFE				0x40000000

#define chipMinorFeatures10_WIDELINE_TRIANGLE_EMU		0x80000000

#define chipMinorFeatures11_VG_RESOLUTION_8K			0x00000001

#define chipMinorFeatures11_FENCE_32BIT				0x00000002

#define chipMinorFeatures11_FENCE_64BIT				0x00000004

#define chipMinorFeatures11_NN_INTERLEVE8			0x00000008

#define chipMinorFeatures11_TP_REORDER				0x00000010

#define chipMinorFeatures11_PE_DEPTH_ONLY_OQFIX			0x00000020

#endif /* COMMON_XML */

#define VIVS_TS_FLUSH_CACHE					0x00001650

#define VIVS_TS_FLUSH_CACHE_FLUSH				0x00000001

#define VIVS_NTE_DESCRIPTOR_FLUSH				0x00014c44

#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK			0xf0000000

#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT			28

#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28(x)			(((x) << VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT) & VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK)

#endif /* STATE_3D_XML */

#ifndef STATE_BLT_XML

#define STATE_BLT_XML

/* Autogenerated file, DO NOT EDIT manually!

This file was generated by the rules-ng-ng headergen tool in this git repository:

http://0x04.net/cgit/index.cgi/rules-ng-ng

git clone git://0x04.net/rules-ng-ng

The rules-ng-ng source files this header was generated from are:

- state.xml     (  26087 bytes, from 2017-12-18 16:51:59)

- common.xml    (  35468 bytes, from 2018-01-22 13:48:54)

- common_3d.xml (  14615 bytes, from 2017-12-18 16:51:59)

- state_hi.xml  (  30232 bytes, from 2018-02-15 15:48:01)

- copyright.xml (   1597 bytes, from 2016-12-08 16:37:56)

- state_2d.xml  (  51552 bytes, from 2016-12-08 16:37:56)

- state_3d.xml  (  79992 bytes, from 2017-12-18 16:51:59)

- state_blt.xml (  13405 bytes, from 2017-12-18 16:51:59)

- state_vg.xml  (   5975 bytes, from 2016-12-08 16:37:56)

Copyright (C) 2012-2017 by the following authors:

- Wladimir J. van der Laan <laanwj@gmail.com>

- Christian Gmeiner <christian.gmeiner@gmail.com>

- Lucas Stach <l.stach@pengutronix.de>

- Russell King <rmk@arm.linux.org.uk>

Permission is hereby granted, free of charge, to any person obtaining a

copy of this software and associated documentation files (the "Software"),

to deal in the Software without restriction, including without limitation

the rights to use, copy, modify, merge, publish, distribute, sub license,

and/or sell copies of the Software, and to permit persons to whom the

Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice (including the

next paragraph) shall be included in all copies or substantial portions

of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL

THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

DEALINGS IN THE SOFTWARE.

*/

/* This is a cut-down version of the state_blt.xml.h file */

#define VIVS_BLT_ENABLE						0x000140b8

#define VIVS_BLT_ENABLE_ENABLE					0x00000001

#endif /* STATE_BLT_XML */