Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0574bd88 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Reject odd pipe source width with double wide/dual link 



In order to guarantee that pipe_src_w/h matches the user mode h/vdisplay
we must not adjust pipe_src_w to accommodate double wide/dual link.
Instead just reject the mode outright.

This will allows us to rely on crtc_state->mode for plane clipping.

Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171123190502.28449-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: default avatarThierry Reding <treding@nvidia.com>
parent a63b8e79

drivers/gpu/drm/i915/intel_display.c

+12 −3
Original line number Diff line number Diff line
@@ -6372,9 +6372,18 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, 
	 * - LVDS dual channel mode

	 * - Double wide pipe

	 */

	if ((intel_crtc_has_type(pipe_config, INTEL_OUTPUT_LVDS) &&

	     intel_is_dual_link_lvds(dev)) || pipe_config->double_wide)

		pipe_config->pipe_src_w &= ~1;

	if (pipe_config->pipe_src_w & 1) {

		if (pipe_config->double_wide) {

			DRM_DEBUG_KMS("Odd pipe source width not supported with double wide pipe\n");

			return -EINVAL;

		}



		if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_LVDS) &&

		    intel_is_dual_link_lvds(dev)) {

			DRM_DEBUG_KMS("Odd pipe source width not supported with dual link LVDS\n");

			return -EINVAL;

		}

	}



	/* Cantiga+ cannot handle modes with a hsync front porch of 0.

	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.