Merge "msm: camera: isp: Support all patterns for TOP TPG" into camera-kernel.lnx.3.1 (0548e191) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/cam_isp/isp_hw_mgr/cam_tfe_hw_mgr.c

+21 −1

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
		* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
		*/

		#include <linux/slab.h>
		@@ -2971,6 +2971,17 @@ static int cam_tfe_mgr_start_hw(void hw_mgr_priv, void start_hw_args)
		sizeof(g_tfe_hw_mgr.debug_cfg.csid_debug));
		}

		/* set tpg debug information for top tpg */
		for (i = 0; i < CAM_TOP_TPG_HW_NUM_MAX; i++) {
		if (g_tfe_hw_mgr.tpg_devices[i]) {
		rc = g_tfe_hw_mgr.tpg_devices[i]->hw_ops.process_cmd(
		g_tfe_hw_mgr.tpg_devices[i]->hw_priv,
		CAM_ISP_HW_CMD_TPG_SET_PATTERN,
		&g_tfe_hw_mgr.debug_cfg.set_tpg_pattern,
		sizeof(g_tfe_hw_mgr.debug_cfg.set_tpg_pattern));
		}
		}

		camif_debug = g_tfe_hw_mgr.debug_cfg.camif_debug;
		list_for_each_entry(hw_mgr_res, &ctx->res_list_tfe_in, list) {
		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
		@@ -5450,6 +5461,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(cam_tfe_camif_debug,

		static int cam_tfe_hw_mgr_debug_register(void)
		{
		g_tfe_hw_mgr.debug_cfg.set_tpg_pattern = CAM_TOP_TPG_DEFAULT_PATTERN;
		g_tfe_hw_mgr.debug_cfg.dentry = debugfs_create_dir("camera_tfe",
		NULL);

		@@ -5482,6 +5494,14 @@ static int cam_tfe_hw_mgr_debug_register(void)
		goto err;
		}

		if (!debugfs_create_u32("set_tpg_pattern",
		0644,
		g_tfe_hw_mgr.debug_cfg.dentry,
		&g_tfe_hw_mgr.debug_cfg.set_tpg_pattern)) {
		CAM_ERR(CAM_ISP, "failed to create set_tpg_pattern");
		goto err;
		}

		if (!debugfs_create_u32("enable_reg_dump",
		0644,
		g_tfe_hw_mgr.debug_cfg.dentry,

drivers/cam_isp/isp_hw_mgr/cam_tfe_hw_mgr.h

+3 −1

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
		* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
		*/

		#ifndef _CAM_TFE_HW_MGR_H_
		@@ -30,6 +30,7 @@
		* @enable_recovery: enable recovery
		* @enable_csid_recovery: enable csid recovery
		* @camif_debug: enable sensor diagnosis status
		* @set_tpg_pattern: tpg pattern information
		* @enable_reg_dump: enable reg dump on error;
		* @per_req_reg_dump: Enable per request reg dump
		*
		@@ -40,6 +41,7 @@ struct cam_tfe_hw_mgr_debug {
		uint32_t enable_recovery;
		uint32_t enable_csid_recovery;
		uint32_t camif_debug;
		uint32_t set_tpg_pattern;
		uint32_t enable_reg_dump;
		uint32_t per_req_reg_dump;
		};

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

+2 −1

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
		* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
		*/

		#ifndef _CAM_ISP_HW_H_
		@@ -114,6 +114,7 @@ enum cam_isp_hw_cmd_type {
		CAM_ISP_HW_CMD_TPG_PHY_CLOCK_UPDATE,
		CAM_ISP_HW_CMD_GET_IRQ_REGISTER_DUMP,
		CAM_ISP_HW_CMD_DUMP_HW,
		CAM_ISP_HW_CMD_TPG_SET_PATTERN,
		CAM_ISP_HW_CMD_MAX,
		};

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_top_tpg_hw_intf.h

+3 −2

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2019, The Linux Foundation. All rights reserved.
		* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
		*/

		#ifndef _CAM_TOP_TPG_HW_INTF_H_
		@@ -13,7 +13,8 @@
		#define CAM_TOP_TPG_HW_NUM_MAX 2
		/* Max supported number of DT for TPG */
		#define CAM_TOP_TPG_MAX_SUPPORTED_DT 4

		/* TPG default pattern should be color bar */
		#define CAM_TOP_TPG_DEFAULT_PATTERN 0x8
		/**
		* enum cam_top_tpg_id - top tpg hw instance id
		*/

drivers/cam_isp/isp_hw_mgr/isp_hw/top_tpg/cam_top_tpg_core.c

+67 −0

Original line number	Diff line number	Diff line
		@@ -400,6 +400,7 @@ static int cam_top_tpg_start(void hw_priv, void start_args,
		const struct cam_top_tpg_reg_offset *tpg_reg;
		struct cam_top_tpg_cfg *tpg_data;
		uint32_t i, val;
		uint32_t in_format = 0;

		if (!hw_priv \|\| !start_args \|\|
		(arg_size != sizeof(struct cam_isp_resource_node))) {
		@@ -456,6 +457,56 @@ static int cam_top_tpg_start(void hw_priv, void start_args,
		cam_io_w_mb(0x2581F4,
		soc_info->reg_map[0].mem_base + tpg_reg->tpg_vc_cfg1);

		/* configure tpg pattern */
		in_format = tpg_data->dt_cfg[0].encode_format & 0xF;
		val = in_format << tpg_reg->tpg_dt_encode_format_shift;

		switch (tpg_hw->tpg_pattern) {
		case 0x0:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x1:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x2:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x3:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x4:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x5:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x6:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x7:
		val = val \| tpg_hw->tpg_pattern;
		break;
		case 0x8:
		/* unicolor bar selection */
		val = 0x1 \| (1 << tpg_reg->top_unicolor_bar_shift);
		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
		tpg_reg->tpg_color_bar_cfg);
		val = (in_format << tpg_reg->tpg_dt_encode_format_shift) \|
		tpg_hw->tpg_pattern;
		break;
		default:
		/* frame with split color bar */
		val = 1 << tpg_reg->tpg_split_en_shift;
		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
		tpg_reg->tpg_color_bar_cfg);
		val = (in_format << tpg_reg->tpg_dt_encode_format_shift) \|
		CAM_TOP_TPG_DEFAULT_PATTERN;
		break;
		}

		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
		tpg_reg->tpg_dt_0_cfg_2);

		val = (1 << tpg_reg->tpg_split_en_shift);
		cam_io_w_mb(tpg_data->pix_pattern, soc_info->reg_map[0].mem_base +
		tpg_reg->tpg_common_gen_cfg);
		@@ -580,6 +631,19 @@ static int cam_top_tpg_set_phy_clock(
		return 0;
		}

		static int cam_top_tpg_set_top_tpg_pattern(struct cam_top_tpg_hw *tpg_hw,
		void *cmd_args)
		{
		uint32_t *top_tpg_pattern;

		top_tpg_pattern = (uint32_t *) cmd_args;
		tpg_hw->tpg_pattern = *top_tpg_pattern;
		CAM_DBG(CAM_ISP, "TPG:%d set tpg debug value:%d",
		tpg_hw->hw_intf->hw_idx, tpg_hw->tpg_pattern);

		return 0;
		}

		static int cam_top_tpg_process_cmd(void *hw_priv,
		uint32_t cmd_type, void *cmd_args, uint32_t arg_size)
		{
		@@ -599,6 +663,9 @@ static int cam_top_tpg_process_cmd(void *hw_priv,
		case CAM_ISP_HW_CMD_TPG_PHY_CLOCK_UPDATE:
		rc = cam_top_tpg_set_phy_clock(tpg_hw, cmd_args);
		break;
		case CAM_ISP_HW_CMD_TPG_SET_PATTERN:
		rc = cam_top_tpg_set_top_tpg_pattern(tpg_hw, cmd_args);
		break;
		default:
		CAM_ERR(CAM_ISP, "TPG:%d unsupported cmd:%d",
		tpg_hw->hw_intf->hw_idx, cmd_type);