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Commit 04ff5a09 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Linus Walleij
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pinctrl: baytrail: Rectify debounce support 



The commit 658b476c ("pinctrl: baytrail: Add debounce configuration")
implements debounce for Baytrail pin control, but seems wasn't tested properly.

The register which keeps debounce value is separated from the configuration
one. Writing wrong values to the latter will guarantee wrong behaviour of the
driver and even might break something physically.

Besides above there is missed case how to disable it, which is actually done
through the bit in configuration register.

Rectify implementation here by using proper register for debounce value.

Fixes: 658b476c ("pinctrl: baytrail: Add debounce configuration")
Cc: Cristina Ciocan <cristina.ciocan@intel.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 17fab473

drivers/pinctrl/intel/pinctrl-baytrail.c

+17 −11
Original line number Diff line number Diff line
@@ -1092,6 +1092,7 @@ static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset, 
	enum pin_config_param param = pinconf_to_config_param(*config);

	void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);

	void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);

	void __iomem *db_reg = byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG);

	unsigned long flags;

	u32 conf, pull, val, debounce;

	u16 arg = 0;
@@ -1128,7 +1129,7 @@ static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset, 
			return -EINVAL;



		raw_spin_lock_irqsave(&vg->lock, flags);

		debounce = readl(byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG));

		debounce = readl(db_reg);

		raw_spin_unlock_irqrestore(&vg->lock, flags);



		switch (debounce & BYT_DEBOUNCE_PULSE_MASK) {
@@ -1176,6 +1177,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, 
	unsigned int param, arg;

	void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);

	void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);

	void __iomem *db_reg = byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG);

	unsigned long flags;

	u32 conf, val, debounce;

	int i, ret = 0;
@@ -1238,36 +1240,40 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, 


			break;

		case PIN_CONFIG_INPUT_DEBOUNCE:

			debounce = readl(byt_gpio_reg(vg, offset,

						      BYT_DEBOUNCE_REG));

			conf &= ~BYT_DEBOUNCE_PULSE_MASK;

			debounce = readl(db_reg);

			debounce &= ~BYT_DEBOUNCE_PULSE_MASK;



			switch (arg) {

			case 0:

				conf &= BYT_DEBOUNCE_EN;

				break;

			case 375:

				conf |= BYT_DEBOUNCE_PULSE_375US;

				debounce |= BYT_DEBOUNCE_PULSE_375US;

				break;

			case 750:

				conf |= BYT_DEBOUNCE_PULSE_750US;

				debounce |= BYT_DEBOUNCE_PULSE_750US;

				break;

			case 1500:

				conf |= BYT_DEBOUNCE_PULSE_1500US;

				debounce |= BYT_DEBOUNCE_PULSE_1500US;

				break;

			case 3000:

				conf |= BYT_DEBOUNCE_PULSE_3MS;

				debounce |= BYT_DEBOUNCE_PULSE_3MS;

				break;

			case 6000:

				conf |= BYT_DEBOUNCE_PULSE_6MS;

				debounce |= BYT_DEBOUNCE_PULSE_6MS;

				break;

			case 12000:

				conf |= BYT_DEBOUNCE_PULSE_12MS;

				debounce |= BYT_DEBOUNCE_PULSE_12MS;

				break;

			case 24000:

				conf |= BYT_DEBOUNCE_PULSE_24MS;

				debounce |= BYT_DEBOUNCE_PULSE_24MS;

				break;

			default:

				ret = -EINVAL;

			}



			if (!ret)

				writel(debounce, db_reg);

			break;

		default:

			ret = -ENOTSUPP;