Merge "mmc: host: msm: Don't check for core-dll lock during hs400es dll init" (04f09214) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/mmc/host/sdhci-msm.c

+38 −25

Original line number	Diff line number	Diff line
		@@ -865,6 +865,9 @@ static int msm_init_cm_dll(struct sdhci_host *host,
		\| CORE_CK_OUT_EN), host->ioaddr +
		msm_host_offset->CORE_DLL_CONFIG);

		/* For hs400es mode, no need to wait for core dll lock */
		if (!(msm_host->enhanced_strobe &&
		mmc_card_strobe(msm_host->mmc->card))) {
		wait_cnt = 50;
		/* Wait until DLL_LOCK bit of DLL_STATUS register becomes '1' */
		while (!(readl_relaxed(host->ioaddr +
		@@ -879,6 +882,7 @@ static int msm_init_cm_dll(struct sdhci_host *host,
		/* wait for 1us before polling again */
		udelay(1);
		}
		}

		out:
		/* Restore the correct PWRSAVE state */
		@@ -3475,12 +3479,12 @@ static int sdhci_msm_enable_controller_clock(struct sdhci_host *host)
		sdhci_msm_registers_restore(host);
		goto out;

		disable_bus_aggr_clk:
		if (!IS_ERR(msm_host->bus_aggr_clk))
		clk_disable_unprepare(msm_host->bus_aggr_clk);
		disable_host_clk:
		if (!IS_ERR(msm_host->clk))
		clk_disable_unprepare(msm_host->clk);
		disable_bus_aggr_clk:
		if (!IS_ERR(msm_host->bus_aggr_clk))
		clk_disable_unprepare(msm_host->bus_aggr_clk);
		disable_pclk:
		if (!IS_ERR(msm_host->pclk))
		clk_disable_unprepare(msm_host->pclk);
		@@ -3504,6 +3508,8 @@ static void sdhci_msm_disable_controller_clock(struct sdhci_host *host)
		clk_disable_unprepare(msm_host->bus_aggr_clk);
		if (!IS_ERR(msm_host->pclk))
		clk_disable_unprepare(msm_host->pclk);
		if (!IS_ERR(msm_host->ice_clk))
		clk_disable_unprepare(msm_host->ice_clk);
		sdhci_msm_bus_voting(host, 0);
		atomic_set(&msm_host->controller_clock, 0);
		pr_debug("%s: %s: disabled controller clock\n",
		@@ -3590,8 +3596,6 @@ static int sdhci_msm_prepare_clocks(struct sdhci_host *host, bool enable)
		clk_disable_unprepare(msm_host->sleep_clk);
		if (!IS_ERR_OR_NULL(msm_host->ff_clk))
		clk_disable_unprepare(msm_host->ff_clk);
		if (!IS_ERR(msm_host->ice_clk))
		clk_disable_unprepare(msm_host->ice_clk);
		if (!IS_ERR_OR_NULL(msm_host->bus_clk))
		clk_disable_unprepare(msm_host->bus_clk);
		sdhci_msm_disable_controller_clock(host);
		@@ -3759,11 +3763,20 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
		* Poll on DLL_LOCK and DDR_DLL_LOCK bits in
		* CORE_DLL_STATUS to be set. This should get set
		* with in 15 us at 200 MHz.
		* No need to check for DLL lock for HS400es mode
		*/
		if (card && mmc_card_strobe(card) &&
		msm_host->enhanced_strobe) {
		rc = readl_poll_timeout(host->ioaddr +
		msm_host_offset->CORE_DLL_STATUS,
		dll_lock, (dll_lock &
		CORE_DDR_DLL_LOCK), 10, 1000);
		} else {
		rc = readl_poll_timeout(host->ioaddr +
		msm_host_offset->CORE_DLL_STATUS,
		dll_lock, (dll_lock & (CORE_DLL_LOCK \|
		CORE_DDR_DLL_LOCK)), 10, 1000);
		}
		if (rc == -ETIMEDOUT)
		pr_err("%s: Unable to get DLL_LOCK/DDR_DLL_LOCK, dll_status: 0x%08x\n",
		mmc_hostname(host->mmc),
		@@ -5666,6 +5679,7 @@ static int sdhci_msm_runtime_suspend(struct device *dev)
		pr_err("%s: failed to suspend crypto engine %d\n",
		mmc_hostname(host->mmc), ret);
		}
		sdhci_msm_disable_controller_clock(host);
		trace_sdhci_msm_runtime_suspend(mmc_hostname(host->mmc), 0,
		ktime_to_us(ktime_sub(ktime_get(), start)));
		return 0;
		@@ -5679,13 +5693,13 @@ static int sdhci_msm_runtime_resume(struct device *dev)
		int ret;
		ktime_t start = ktime_get();

		if (host->is_crypto_en) {
		ret = sdhci_msm_enable_controller_clock(host);
		if (ret) {
		pr_err("%s: Failed to enable reqd clocks\n",
		mmc_hostname(host->mmc));
		goto skip_ice_resume;
		}
		if (host->is_crypto_en) {
		ret = sdhci_msm_ice_resume(host);
		if (ret)
		pr_err("%s: failed to resume crypto engine %d\n",
		@@ -5726,7 +5740,6 @@ static int sdhci_msm_suspend(struct device *dev)
		}
		ret = sdhci_msm_runtime_suspend(dev);
		out:
		sdhci_msm_disable_controller_clock(host);
		if (host->mmc->card && mmc_card_sdio(host->mmc->card)) {
		sdio_cfg = sdhci_msm_cfg_sdio_wakeup(host, true);
		if (sdio_cfg)