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Commit 04e78317 authored by Shravya Samala's avatar Shravya Samala
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msm: camera: cdm: Debug info in case of cdm page fault



When tfe cdm callback is called with cdm page
fault or invalid irq status,then dump last submitted
BLs hw_addr, length, type of BL and also dump
patch info for the request that hit CDM page
fault/invalid irq.

CRs-Fixed: 2663740
Change-Id: I19763598876faa8e9497870338c611369730933e
Signed-off-by: default avatarShravya Samala <shravyas@codeaurora.org>
parent 5e5a54b6
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+1 −0
Original line number Diff line number Diff line
@@ -204,6 +204,7 @@ void cam_cdm_notify_clients(struct cam_hw_info *cdm_hw,
	} else if (status == CAM_CDM_CB_STATUS_HW_RESET_DONE ||
			status == CAM_CDM_CB_STATUS_HW_FLUSH ||
			status == CAM_CDM_CB_STATUS_HW_RESUBMIT ||
			status == CAM_CDM_CB_STATUS_INVALID_BL_CMD ||
			status == CAM_CDM_CB_STATUS_HW_ERROR) {
		int client_idx;
		struct cam_cdm_bl_cb_request_entry *node =
+145 −112
Original line number Diff line number Diff line
@@ -1056,7 +1056,8 @@ static void cam_hw_cdm_reset_cleanup(
	struct cam_cdm_bl_cb_request_entry *node, *tnode;
	bool flush_hw = false;

	if (test_bit(CAM_CDM_FLUSH_HW_STATUS, &core->cdm_status))
	if (test_bit(CAM_CDM_ERROR_HW_STATUS, &core->cdm_status) ||
		test_bit(CAM_CDM_FLUSH_HW_STATUS, &core->cdm_status))
		flush_hw = true;

	for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++) {
@@ -1094,9 +1095,15 @@ static void cam_hw_cdm_work(struct work_struct *work)
	struct cam_hw_info *cdm_hw;
	struct cam_cdm *core;
	int i, fifo_idx;
	struct cam_cdm_bl_cb_request_entry *tnode = NULL;
	struct cam_cdm_bl_cb_request_entry *node = NULL;

	payload = container_of(work, struct cam_cdm_work_payload, work);
	if (payload) {
	if (!payload) {
		CAM_ERR(CAM_CDM, "NULL payload");
		return;
	}

	cdm_hw = payload->hw;
	core = (struct cam_cdm *)cdm_hw->core_info;
	fifo_idx = payload->fifo_idx;
@@ -1107,17 +1114,16 @@ static void cam_hw_cdm_work(struct work_struct *work)
		payload = NULL;
		return;
	}

	cam_req_mgr_thread_switch_delay_detect(
		payload->workq_scheduled_ts);

	CAM_DBG(CAM_CDM, "IRQ status=0x%x", payload->irq_status);
	if (payload->irq_status &
		CAM_CDM_IRQ_STATUS_INLINE_IRQ_MASK) {
			struct cam_cdm_bl_cb_request_entry *node, *tnode;

		CAM_DBG(CAM_CDM, "inline IRQ data=0x%x last tag: 0x%x",
			payload->irq_data,
				core->bl_fifo[fifo_idx]
			core->bl_fifo[payload->fifo_idx]
				.last_bl_tag_done);

		if (payload->irq_data == 0xff) {
@@ -1179,22 +1185,24 @@ static void cam_hw_cdm_work(struct work_struct *work)
		} else {
			CAM_INFO(CAM_CDM,
				"Skip GenIRQ, tag 0x%x fifo %d",
					payload->irq_data, fifo_idx);
				payload->irq_data, payload->fifo_idx);
		}
			mutex_unlock(&core->bl_fifo[fifo_idx]
		mutex_unlock(&core->bl_fifo[payload->fifo_idx]
			.fifo_lock);
	}

	if (payload->irq_status &
		CAM_CDM_IRQ_STATUS_BL_DONE_MASK) {
			if (test_bit(fifo_idx, &core->cdm_status)) {
		if (test_bit(payload->fifo_idx, &core->cdm_status)) {
			CAM_DBG(CAM_CDM, "CDM HW BL done IRQ");
				complete(&core->bl_fifo[fifo_idx]
			complete(&core->bl_fifo[payload->fifo_idx]
				.bl_complete);
		}
	}
	if (payload->irq_status &
		CAM_CDM_IRQ_STATUS_ERRORS) {
		int reset_hw_hdl = 0x0;

		CAM_ERR_RATE_LIMIT(CAM_CDM,
			"CDM Error IRQ status %d\n",
			payload->irq_status);
@@ -1209,11 +1217,39 @@ static void cam_hw_cdm_work(struct work_struct *work)
		 */
		cam_hw_cdm_pause_core(cdm_hw, true);
		cam_hw_cdm_dump_core_debug_registers(cdm_hw);

		if (payload->irq_status &
		CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK) {
			node = list_first_entry_or_null(
			&core->bl_fifo[payload->fifo_idx].bl_request_list,
			struct cam_cdm_bl_cb_request_entry, entry);

			if (node != NULL) {
				if (node->request_type ==
					CAM_HW_CDM_BL_CB_CLIENT) {
					cam_cdm_notify_clients(cdm_hw,
					CAM_CDM_CB_STATUS_INVALID_BL_CMD,
						(void *)node);
				} else if (node->request_type ==
					CAM_HW_CDM_BL_CB_INTERNAL) {
					CAM_ERR(CAM_CDM,
						"Invalid node=%pK %d", node,
						node->request_type);
				}
				list_del_init(&node->entry);
				kfree(node);
			}
		}
		/* Resume CDM back */
		cam_hw_cdm_pause_core(cdm_hw, false);
		for (i = 0; i < core->offsets->reg_data->num_bl_fifo;
				i++)
			mutex_unlock(&core->bl_fifo[i].fifo_lock);

		if (payload->irq_status &
			CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK)
			cam_hw_cdm_reset_hw(cdm_hw, reset_hw_hdl);

		mutex_unlock(&cdm_hw->hw_mutex);
		if (!(payload->irq_status &
				CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK))
@@ -1222,9 +1258,6 @@ static void cam_hw_cdm_work(struct work_struct *work)
	}
	kfree(payload);
	payload = NULL;
	} else {
		CAM_ERR(CAM_CDM, "NULL payload");
	}

}

+37 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@
#include "cam_cdm_util.h"
#include "cam_soc_util.h"

#define CAM_CDM_BL_CMD_MAX  25

/* enum cam_cdm_id - Enum for possible CAM CDM hardwares */
enum cam_cdm_id {
	CAM_CDM_VIRTUAL,
@@ -150,6 +152,41 @@ struct cam_cdm_bl_request {
	struct cam_cdm_bl_cmd cmd[1];
};

/**
 * struct cam_cdm_bl_data - last submiited CDM BL data
 *
 * @mem_handle : Input mem handle of bl cmd
 * @hw_addr    : Hw address of submitted Bl command
 * @offset     : Input offset of the actual bl cmd in the memory pointed
 *               by mem_handle
 * @len        : length of submitted Bl command to CDM.
 * @input_len  : Input length of the BL command, Cannot be more than 1MB and
 *           this is will be validated with offset+size of the memory pointed
 *           by mem_handle
 * @type       :  CDM bl cmd addr types.
 */
struct cam_cdm_bl_data {
	int32_t mem_handle;
	dma_addr_t hw_addr;
	uint32_t offset;
	size_t len;
	uint32_t  input_len;
	enum cam_cdm_bl_cmd_addr_type type;
};

/**
 * struct cam_cdm_bl_info
 *
 * @bl_count   : No. of Bl commands submiited to CDM.
 * @cmd        : payload holding the BL cmd's arrary
 *               that is sumbitted.
 *
 */
struct cam_cdm_bl_info {
	int32_t bl_count;
	struct cam_cdm_bl_data cmd[CAM_CDM_BL_CMD_MAX];
};

/**
 * @brief : API to get the CDM capabilities for a camera device type
 *
+66 −12
Original line number Diff line number Diff line
@@ -689,25 +689,53 @@ int cam_cdm_util_cmd_buf_write(void __iomem **current_device_base,
	return ret;
}

static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr)
static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr,
	uint32_t *cmd_buf_addr_end)
{
	long ret = 0;
	struct cdm_dmi_cmd *p_dmi_cmd;
	uint32_t *temp_ptr = cmd_buf_addr;

	p_dmi_cmd = (struct cdm_dmi_cmd *)cmd_buf_addr;
	temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI];
	ret += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI];
	CAM_INFO(CAM_CDM, "DMI");

	if (temp_ptr > cmd_buf_addr_end)
		CAM_ERR(CAM_CDM,
			"Invalid cmd start addr:%pK end addr:%pK",
			temp_ptr, cmd_buf_addr_end);

	CAM_INFO(CAM_CDM,
		"DMI: LEN: %u DMIAddr: 0x%X DMISel: 0x%X LUT_addr: 0x%X",
		p_dmi_cmd->length, p_dmi_cmd->DMIAddr,
		p_dmi_cmd->DMISel, p_dmi_cmd->addr);
	return ret;
}

static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr)
static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr,
	uint32_t *cmd_buf_addr_end)
{
	long ret = 0;
	struct cdm_indirect_cmd *p_indirect_cmd;
	uint32_t *temp_ptr = cmd_buf_addr;

	p_indirect_cmd = (struct cdm_indirect_cmd *)cmd_buf_addr;
	temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT];
	ret += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT];
	CAM_INFO(CAM_CDM, "Buff Indirect");

	if (temp_ptr > cmd_buf_addr_end)
		CAM_ERR(CAM_CDM,
			"Invalid cmd start addr:%pK end addr:%pK",
			temp_ptr, cmd_buf_addr_end);

	CAM_INFO(CAM_CDM,
		"Buff Indirect: LEN: %u addr: 0x%X",
		p_indirect_cmd->length, p_indirect_cmd->addr);
	return ret;
}

static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr)
static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr,
	uint32_t *cmd_buf_addr_end)
{
	long ret = 0;
	struct cdm_regcontinuous_cmd *p_regcont_cmd;
@@ -722,6 +750,12 @@ static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr)
		p_regcont_cmd->count, p_regcont_cmd->offset);

	for (i = 0; i < p_regcont_cmd->count; i++) {
		if (temp_ptr > cmd_buf_addr_end) {
			CAM_ERR(CAM_CDM,
				"Invalid cmd(%d) start addr:%pK end addr:%pK",
				i, temp_ptr, cmd_buf_addr_end);
			break;
		}
		CAM_INFO(CAM_CDM, "DATA_%d: 0x%X", i,
			*temp_ptr);
		temp_ptr++;
@@ -731,7 +765,8 @@ static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr)
	return ret;
}

static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr)
static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr,
	uint32_t *cmd_buf_addr_end)
{
	struct cdm_regrandom_cmd *p_regrand_cmd;
	uint32_t *temp_ptr = cmd_buf_addr;
@@ -746,6 +781,12 @@ static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr)
		p_regrand_cmd->count);

	for (i = 0; i < p_regrand_cmd->count; i++) {
		if (temp_ptr > cmd_buf_addr_end) {
			CAM_ERR(CAM_CDM,
				"Invalid cmd(%d) start addr:%pK end addr:%pK",
				i, temp_ptr, cmd_buf_addr_end);
			break;
		}
		CAM_INFO(CAM_CDM, "OFFSET_%d: 0x%X DATA_%d: 0x%X",
			i, *temp_ptr & CAM_CDM_REG_OFFSET_MASK, i,
			*(temp_ptr + 1));
@@ -778,15 +819,22 @@ static long cam_cdm_util_dump_wait_event_cmd(uint32_t *cmd_buf_addr)
	return ret;
}

static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr)
static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr,
	uint32_t *cmd_buf_addr_end)
{
	long ret = 0;
	struct cdm_changebase_cmd *p_cbase_cmd;
	uint32_t *temp_ptr = cmd_buf_addr;

	p_cbase_cmd = (struct cdm_changebase_cmd *)temp_ptr;
	temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE];
	ret += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE];

	if (temp_ptr > cmd_buf_addr_end)
		CAM_ERR(CAM_CDM,
			"Invalid cmd start addr:%pK end addr:%pK",
			temp_ptr, cmd_buf_addr_end);

	CAM_INFO(CAM_CDM, "CHANGE_BASE: 0x%X",
		p_cbase_cmd->base);

@@ -808,6 +856,7 @@ void cam_cdm_util_dump_cmd_buf(
	uint32_t *cmd_buf_start, uint32_t *cmd_buf_end)
{
	uint32_t *buf_now = cmd_buf_start;
	uint32_t *buf_end = cmd_buf_end;
	uint32_t cmd = 0;

	if (!cmd_buf_start || !cmd_buf_end) {
@@ -823,16 +872,20 @@ void cam_cdm_util_dump_cmd_buf(
		case CAM_CDM_CMD_DMI:
		case CAM_CDM_CMD_DMI_32:
		case CAM_CDM_CMD_DMI_64:
			buf_now += cam_cdm_util_dump_dmi_cmd(buf_now);
			buf_now += cam_cdm_util_dump_dmi_cmd(buf_now,
				buf_end);
			break;
		case CAM_CDM_CMD_REG_CONT:
			buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now);
			buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now,
				buf_end);
			break;
		case CAM_CDM_CMD_REG_RANDOM:
			buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now);
			buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now,
				buf_end);
			break;
		case CAM_CDM_CMD_BUFF_INDIRECT:
			buf_now += cam_cdm_util_dump_buff_indirect(buf_now);
			buf_now += cam_cdm_util_dump_buff_indirect(buf_now,
				buf_end);
			break;
		case CAM_CDM_CMD_GEN_IRQ:
			buf_now += cam_cdm_util_dump_gen_irq_cmd(buf_now);
@@ -841,7 +894,8 @@ void cam_cdm_util_dump_cmd_buf(
			buf_now += cam_cdm_util_dump_wait_event_cmd(buf_now);
			break;
		case CAM_CDM_CMD_CHANGE_BASE:
			buf_now += cam_cdm_util_dump_change_base_cmd(buf_now);
			buf_now += cam_cdm_util_dump_change_base_cmd(buf_now,
				buf_end);
			break;
		case CAM_CDM_CMD_PERF_CTRL:
			buf_now += cam_cdm_util_dump_perf_ctrl_cmd(buf_now);
+1 −0
Original line number Diff line number Diff line
@@ -3626,6 +3626,7 @@ static int __cam_isp_ctx_config_dev_in_top_state(
	req_isp->num_fence_map_in = cfg.num_in_map_entries;
	req_isp->num_acked = 0;
	req_isp->bubble_detected = false;
	req_isp->hw_update_data.packet = packet;

	for (i = 0; i < req_isp->num_fence_map_out; i++) {
		rc = cam_sync_get_obj_ref(req_isp->fence_map_out[i].sync_id);
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