drm/i915/gvt: do not return error on handling force_to_nonpriv registers (0438a105) · Commits · e / devices / android_kernel_fairphone_FP4

Return error will cause vm hang and enter failsafe mode. However, we don't want that happen on detecting an wrong force_to_nonpriv register write. Therefore, we just omit the wrong write or patch it to default value. v2: only return 0 on detecting lri write of registers outside whitelist, but still return error on other error conditions. (zhenyu wang) Signed-off-by:

Zhao Yan <yan.y.zhao@intel.com> Reviewed-by:

Zhang Yulei <yulei.zhang@intel.com> Signed-off-by:

Zhenyu Wang <zhenyuw@linux.intel.com>

drivers/gpu/drm/i915/gvt/cmd_parser.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -828,7 +828,8 @@ static int force_nonpriv_reg_handler(struct parser_exec_state *s,
		data != nopid) {
		gvt_err("Unexpected forcenonpriv 0x%x LRI write, value=0x%x\n",
		offset, data);
		return -EPERM;
		patch_value(s, cmd_ptr(s, index), nopid);
		return 0;
		}
		return 0;
		}

drivers/gpu/drm/i915/gvt/handlers.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -495,7 +495,7 @@ static int force_nonpriv_write(struct intel_vgpu *vgpu,
		gvt_err("vgpu(%d) Invalid FORCE_NONPRIV write %x at offset %x\n",
		vgpu->id, reg_nonpriv, offset);

		return ret;
		return 0;
		}

		static int ddi_buf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,