Commit 03ebb419 authored Feb 09, 2018 by Vaibhav Jain Committed by Michael Ellerman Mar 13, 2018

cxl: Enable NORST bit in PSL_DEBUG register for PSL9



We enable the NORST bit by default for debug afu images to prevent
reset of AFU trace-data on a PCI link drop. For production AFU images
this bit is always ignored and PSL gets reconfigured anyways thereby
resetting the trace data. So setting this bit for non-debug images
doesn't have any impact.

Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

parent 1ff3b404

drivers/misc/cxl/pci.c

+6 −2

Original line number	Diff line number	Diff line
		@@ -503,8 +503,12 @@ static int init_implementation_adapter_regs_psl9(struct cxl *adapter,
		if (cxl_is_power9_dd1()) {
		/* Disabling deadlock counter CAR */
		cxl_p1_write(adapter, CXL_PSL9_GP_CT, 0x0020000000000001ULL);
		} else
		cxl_p1_write(adapter, CXL_PSL9_DEBUG, 0x4000000000000000ULL);
		/* Enable NORST */
		cxl_p1_write(adapter, CXL_PSL9_DEBUG, 0x8000000000000000ULL);
		} else {
		/* Enable NORST and DD2 features */
		cxl_p1_write(adapter, CXL_PSL9_DEBUG, 0xC000000000000000ULL);
		}

		return 0;
		}